diff options
author | 2015-08-04 12:17:53 -0700 | |
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committer | 2015-08-04 15:44:42 -0700 | |
commit | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch) | |
tree | 1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/sh/boards/mach-se/7206 | |
parent | 98260f3884f4a202f9ca5eabed40b1354c489b29 (diff) |
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base.
It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and
the base is:
commit 0917f823c59692d751951bf5ea699a2d1e2f26a2
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Sat Jul 25 12:13:34 2015 +0200
Prepare v4.1.3-rt3
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
We lose all the git history this way and it's not good. We
should apply another opnfv project repo in future.
Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/sh/boards/mach-se/7206')
-rw-r--r-- | kernel/arch/sh/boards/mach-se/7206/Makefile | 5 | ||||
-rw-r--r-- | kernel/arch/sh/boards/mach-se/7206/irq.c | 150 | ||||
-rw-r--r-- | kernel/arch/sh/boards/mach-se/7206/setup.c | 95 |
3 files changed, 250 insertions, 0 deletions
diff --git a/kernel/arch/sh/boards/mach-se/7206/Makefile b/kernel/arch/sh/boards/mach-se/7206/Makefile new file mode 100644 index 000000000..5c9eaa053 --- /dev/null +++ b/kernel/arch/sh/boards/mach-se/7206/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for the 7206 SolutionEngine specific parts of the kernel +# + +obj-y := setup.o irq.o diff --git a/kernel/arch/sh/boards/mach-se/7206/irq.c b/kernel/arch/sh/boards/mach-se/7206/irq.c new file mode 100644 index 000000000..0db058e70 --- /dev/null +++ b/kernel/arch/sh/boards/mach-se/7206/irq.c @@ -0,0 +1,150 @@ +/* + * linux/arch/sh/boards/se/7206/irq.c + * + * Copyright (C) 2005,2006 Yoshinori Sato + * + * Hitachi SolutionEngine Support. + * + */ +#include <linux/init.h> +#include <linux/irq.h> +#include <linux/io.h> +#include <linux/interrupt.h> +#include <mach-se/mach/se7206.h> + +#define INTSTS0 0x31800000 +#define INTSTS1 0x31800002 +#define INTMSK0 0x31800004 +#define INTMSK1 0x31800006 +#define INTSEL 0x31800008 + +#define IRQ0_IRQ 64 +#define IRQ1_IRQ 65 +#define IRQ3_IRQ 67 + +#define INTC_IPR01 0xfffe0818 +#define INTC_ICR1 0xfffe0802 + +static void disable_se7206_irq(struct irq_data *data) +{ + unsigned int irq = data->irq; + unsigned short val; + unsigned short mask = 0xffff ^ (0x0f << 4 * (3 - (IRQ0_IRQ - irq))); + unsigned short msk0,msk1; + + /* Set the priority in IPR to 0 */ + val = __raw_readw(INTC_IPR01); + val &= mask; + __raw_writew(val, INTC_IPR01); + /* FPGA mask set */ + msk0 = __raw_readw(INTMSK0); + msk1 = __raw_readw(INTMSK1); + + switch (irq) { + case IRQ0_IRQ: + msk0 |= 0x0010; + break; + case IRQ1_IRQ: + msk0 |= 0x000f; + break; + case IRQ3_IRQ: + msk0 |= 0x0f00; + msk1 |= 0x00ff; + break; + } + __raw_writew(msk0, INTMSK0); + __raw_writew(msk1, INTMSK1); +} + +static void enable_se7206_irq(struct irq_data *data) +{ + unsigned int irq = data->irq; + unsigned short val; + unsigned short value = (0x0001 << 4 * (3 - (IRQ0_IRQ - irq))); + unsigned short msk0,msk1; + + /* Set priority in IPR back to original value */ + val = __raw_readw(INTC_IPR01); + val |= value; + __raw_writew(val, INTC_IPR01); + + /* FPGA mask reset */ + msk0 = __raw_readw(INTMSK0); + msk1 = __raw_readw(INTMSK1); + + switch (irq) { + case IRQ0_IRQ: + msk0 &= ~0x0010; + break; + case IRQ1_IRQ: + msk0 &= ~0x000f; + break; + case IRQ3_IRQ: + msk0 &= ~0x0f00; + msk1 &= ~0x00ff; + break; + } + __raw_writew(msk0, INTMSK0); + __raw_writew(msk1, INTMSK1); +} + +static void eoi_se7206_irq(struct irq_data *data) +{ + unsigned short sts0,sts1; + unsigned int irq = data->irq; + + if (!irqd_irq_disabled(data) && !irqd_irq_inprogress(data)) + enable_se7206_irq(data); + /* FPGA isr clear */ + sts0 = __raw_readw(INTSTS0); + sts1 = __raw_readw(INTSTS1); + + switch (irq) { + case IRQ0_IRQ: + sts0 &= ~0x0010; + break; + case IRQ1_IRQ: + sts0 &= ~0x000f; + break; + case IRQ3_IRQ: + sts0 &= ~0x0f00; + sts1 &= ~0x00ff; + break; + } + __raw_writew(sts0, INTSTS0); + __raw_writew(sts1, INTSTS1); +} + +static struct irq_chip se7206_irq_chip __read_mostly = { + .name = "SE7206-FPGA", + .irq_mask = disable_se7206_irq, + .irq_unmask = enable_se7206_irq, + .irq_eoi = eoi_se7206_irq, +}; + +static void make_se7206_irq(unsigned int irq) +{ + disable_irq_nosync(irq); + irq_set_chip_and_handler_name(irq, &se7206_irq_chip, + handle_level_irq, "level"); + disable_se7206_irq(irq_get_irq_data(irq)); +} + +/* + * Initialize IRQ setting + */ +void __init init_se7206_IRQ(void) +{ + make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */ + make_se7206_irq(IRQ1_IRQ); /* ATA */ + make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */ + + __raw_writew(__raw_readw(INTC_ICR1) | 0x000b, INTC_ICR1); /* ICR1 */ + + /* FPGA System register setup*/ + __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */ + __raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */ + + /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */ + __raw_writew(0x0001,INTSEL); +} diff --git a/kernel/arch/sh/boards/mach-se/7206/setup.c b/kernel/arch/sh/boards/mach-se/7206/setup.c new file mode 100644 index 000000000..68883ec95 --- /dev/null +++ b/kernel/arch/sh/boards/mach-se/7206/setup.c @@ -0,0 +1,95 @@ +/* + * + * linux/arch/sh/boards/se/7206/setup.c + * + * Copyright (C) 2006 Yoshinori Sato + * Copyright (C) 2007 - 2008 Paul Mundt + * + * Hitachi 7206 SolutionEngine Support. + */ +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/smc91x.h> +#include <mach-se/mach/se7206.h> +#include <asm/io.h> +#include <asm/machvec.h> +#include <asm/heartbeat.h> + +static struct resource smc91x_resources[] = { + [0] = { + .name = "smc91x-regs", + .start = PA_SMSC + 0x300, + .end = PA_SMSC + 0x300 + 0x020 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 64, + .end = 64, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct smc91x_platdata smc91x_info = { + .flags = SMC91X_USE_16BIT, +}; + +static struct platform_device smc91x_device = { + .name = "smc91x", + .id = -1, + .dev = { + .dma_mask = NULL, + .coherent_dma_mask = 0xffffffff, + .platform_data = &smc91x_info, + }, + .num_resources = ARRAY_SIZE(smc91x_resources), + .resource = smc91x_resources, +}; + +static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 }; + +static struct heartbeat_data heartbeat_data = { + .bit_pos = heartbeat_bit_pos, + .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), +}; + +static struct resource heartbeat_resource = { + .start = PA_LED, + .end = PA_LED, + .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT, +}; + +static struct platform_device heartbeat_device = { + .name = "heartbeat", + .id = -1, + .dev = { + .platform_data = &heartbeat_data, + }, + .num_resources = 1, + .resource = &heartbeat_resource, +}; + +static struct platform_device *se7206_devices[] __initdata = { + &smc91x_device, + &heartbeat_device, +}; + +static int __init se7206_devices_setup(void) +{ + return platform_add_devices(se7206_devices, ARRAY_SIZE(se7206_devices)); +} +device_initcall(se7206_devices_setup); + +static int se7206_mode_pins(void) +{ + return MODE_PIN1 | MODE_PIN2; +} + +/* + * The Machine Vector + */ + +static struct sh_machine_vector mv_se __initmv = { + .mv_name = "SolutionEngine", + .mv_init_irq = init_se7206_IRQ, + .mv_mode_pins = se7206_mode_pins, +}; |