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author | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 12:17:53 -0700 |
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committer | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 15:44:42 -0700 |
commit | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch) | |
tree | 1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/sh/boards/mach-sdk7786/fpga.c | |
parent | 98260f3884f4a202f9ca5eabed40b1354c489b29 (diff) |
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base.
It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and
the base is:
commit 0917f823c59692d751951bf5ea699a2d1e2f26a2
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Sat Jul 25 12:13:34 2015 +0200
Prepare v4.1.3-rt3
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
We lose all the git history this way and it's not good. We
should apply another opnfv project repo in future.
Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/sh/boards/mach-sdk7786/fpga.c')
-rw-r--r-- | kernel/arch/sh/boards/mach-sdk7786/fpga.c | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/kernel/arch/sh/boards/mach-sdk7786/fpga.c b/kernel/arch/sh/boards/mach-sdk7786/fpga.c new file mode 100644 index 000000000..3e4ec66a0 --- /dev/null +++ b/kernel/arch/sh/boards/mach-sdk7786/fpga.c @@ -0,0 +1,72 @@ +/* + * SDK7786 FPGA Support. + * + * Copyright (C) 2010 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/init.h> +#include <linux/io.h> +#include <linux/bcd.h> +#include <mach/fpga.h> +#include <asm/sizes.h> + +#define FPGA_REGS_OFFSET 0x03fff800 +#define FPGA_REGS_SIZE 0x490 + +/* + * The FPGA can be mapped in any of the generally available areas, + * so we attempt to scan for it using the fixed SRSTR read magic. + * + * Once the FPGA is located, the rest of the mapping data for the other + * components can be determined dynamically from its section mapping + * registers. + */ +static void __iomem *sdk7786_fpga_probe(void) +{ + unsigned long area; + void __iomem *base; + + /* + * Iterate over all of the areas where the FPGA could be mapped. + * The possible range is anywhere from area 0 through 6, area 7 + * is reserved. + */ + for (area = PA_AREA0; area < PA_AREA7; area += SZ_64M) { + base = ioremap_nocache(area + FPGA_REGS_OFFSET, FPGA_REGS_SIZE); + if (!base) { + /* Failed to remap this area, move along. */ + continue; + } + + if (ioread16(base + SRSTR) == SRSTR_MAGIC) + return base; /* Found it! */ + + iounmap(base); + } + + return NULL; +} + +void __iomem *sdk7786_fpga_base; + +void __init sdk7786_fpga_init(void) +{ + u16 version, date; + + sdk7786_fpga_base = sdk7786_fpga_probe(); + if (unlikely(!sdk7786_fpga_base)) { + panic("FPGA detection failed.\n"); + return; + } + + version = fpga_read_reg(FPGAVR); + date = fpga_read_reg(FPGADR); + + pr_info("\tFPGA version:\t%d.%d (built on %d/%d/%d)\n", + bcd2bin(version >> 8) & 0xf, bcd2bin(version & 0xf), + ((date >> 12) & 0xf) + 2000, + (date >> 8) & 0xf, bcd2bin(date & 0xff)); +} |