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author | 2015-08-04 12:17:53 -0700 | |
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committer | 2015-08-04 15:44:42 -0700 | |
commit | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch) | |
tree | 1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/powerpc/include/asm/oprofile_impl.h | |
parent | 98260f3884f4a202f9ca5eabed40b1354c489b29 (diff) |
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base.
It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and
the base is:
commit 0917f823c59692d751951bf5ea699a2d1e2f26a2
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Sat Jul 25 12:13:34 2015 +0200
Prepare v4.1.3-rt3
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
We lose all the git history this way and it's not good. We
should apply another opnfv project repo in future.
Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/powerpc/include/asm/oprofile_impl.h')
-rw-r--r-- | kernel/arch/powerpc/include/asm/oprofile_impl.h | 139 |
1 files changed, 139 insertions, 0 deletions
diff --git a/kernel/arch/powerpc/include/asm/oprofile_impl.h b/kernel/arch/powerpc/include/asm/oprofile_impl.h new file mode 100644 index 000000000..61fe5d6f1 --- /dev/null +++ b/kernel/arch/powerpc/include/asm/oprofile_impl.h @@ -0,0 +1,139 @@ +/* + * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM + * + * Based on alpha version. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#ifndef _ASM_POWERPC_OPROFILE_IMPL_H +#define _ASM_POWERPC_OPROFILE_IMPL_H +#ifdef __KERNEL__ + +#define OP_MAX_COUNTER 8 + +/* Per-counter configuration as set via oprofilefs. */ +struct op_counter_config { + unsigned long enabled; + unsigned long event; + unsigned long count; + /* Classic doesn't support per-counter user/kernel selection */ + unsigned long kernel; + unsigned long user; + unsigned long unit_mask; +}; + +/* System-wide configuration as set via oprofilefs. */ +struct op_system_config { +#ifdef CONFIG_PPC64 + unsigned long mmcr0; + unsigned long mmcr1; + unsigned long mmcra; +#ifdef CONFIG_OPROFILE_CELL + /* Register for oprofile user tool to check cell kernel profiling + * support. + */ + unsigned long cell_support; +#endif +#endif + unsigned long enable_kernel; + unsigned long enable_user; +}; + +/* Per-arch configuration */ +struct op_powerpc_model { + int (*reg_setup) (struct op_counter_config *, + struct op_system_config *, + int num_counters); + int (*cpu_setup) (struct op_counter_config *); + int (*start) (struct op_counter_config *); + int (*global_start) (struct op_counter_config *); + void (*stop) (void); + void (*global_stop) (void); + int (*sync_start)(void); + int (*sync_stop)(void); + void (*handle_interrupt) (struct pt_regs *, + struct op_counter_config *); + int num_counters; +}; + +extern struct op_powerpc_model op_model_fsl_emb; +extern struct op_powerpc_model op_model_power4; +extern struct op_powerpc_model op_model_7450; +extern struct op_powerpc_model op_model_cell; +extern struct op_powerpc_model op_model_pa6t; + + +/* All the classic PPC parts use these */ +static inline unsigned int classic_ctr_read(unsigned int i) +{ + switch(i) { + case 0: + return mfspr(SPRN_PMC1); + case 1: + return mfspr(SPRN_PMC2); + case 2: + return mfspr(SPRN_PMC3); + case 3: + return mfspr(SPRN_PMC4); + case 4: + return mfspr(SPRN_PMC5); + case 5: + return mfspr(SPRN_PMC6); + +/* No PPC32 chip has more than 6 so far */ +#ifdef CONFIG_PPC64 + case 6: + return mfspr(SPRN_PMC7); + case 7: + return mfspr(SPRN_PMC8); +#endif + default: + return 0; + } +} + +static inline void classic_ctr_write(unsigned int i, unsigned int val) +{ + switch(i) { + case 0: + mtspr(SPRN_PMC1, val); + break; + case 1: + mtspr(SPRN_PMC2, val); + break; + case 2: + mtspr(SPRN_PMC3, val); + break; + case 3: + mtspr(SPRN_PMC4, val); + break; + case 4: + mtspr(SPRN_PMC5, val); + break; + case 5: + mtspr(SPRN_PMC6, val); + break; + +/* No PPC32 chip has more than 6, yet */ +#ifdef CONFIG_PPC64 + case 6: + mtspr(SPRN_PMC7, val); + break; + case 7: + mtspr(SPRN_PMC8, val); + break; +#endif + default: + break; + } +} + + +extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth); + +#endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_OPROFILE_IMPL_H */ |