diff options
author | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 12:17:53 -0700 |
---|---|---|
committer | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 15:44:42 -0700 |
commit | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch) | |
tree | 1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/mips/include/uapi/asm/swab.h | |
parent | 98260f3884f4a202f9ca5eabed40b1354c489b29 (diff) |
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base.
It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and
the base is:
commit 0917f823c59692d751951bf5ea699a2d1e2f26a2
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Sat Jul 25 12:13:34 2015 +0200
Prepare v4.1.3-rt3
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
We lose all the git history this way and it's not good. We
should apply another opnfv project repo in future.
Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/mips/include/uapi/asm/swab.h')
-rw-r--r-- | kernel/arch/mips/include/uapi/asm/swab.h | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/kernel/arch/mips/include/uapi/asm/swab.h b/kernel/arch/mips/include/uapi/asm/swab.h new file mode 100644 index 000000000..8f2d184db --- /dev/null +++ b/kernel/arch/mips/include/uapi/asm/swab.h @@ -0,0 +1,69 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1996, 99, 2003 by Ralf Baechle + */ +#ifndef _ASM_SWAB_H +#define _ASM_SWAB_H + +#include <linux/compiler.h> +#include <linux/types.h> + +#define __SWAB_64_THRU_32__ + +#if (defined(__mips_isa_rev) && (__mips_isa_rev >= 2)) || \ + defined(_MIPS_ARCH_LOONGSON3A) + +static inline __attribute_const__ __u16 __arch_swab16(__u16 x) +{ + __asm__( + " .set push \n" + " .set arch=mips32r2 \n" + " wsbh %0, %1 \n" + " .set pop \n" + : "=r" (x) + : "r" (x)); + + return x; +} +#define __arch_swab16 __arch_swab16 + +static inline __attribute_const__ __u32 __arch_swab32(__u32 x) +{ + __asm__( + " .set push \n" + " .set arch=mips32r2 \n" + " wsbh %0, %1 \n" + " rotr %0, %0, 16 \n" + " .set pop \n" + : "=r" (x) + : "r" (x)); + + return x; +} +#define __arch_swab32 __arch_swab32 + +/* + * Having already checked for MIPS R2, enable the optimized version for + * 64-bit kernel on r2 CPUs. + */ +#ifdef __mips64 +static inline __attribute_const__ __u64 __arch_swab64(__u64 x) +{ + __asm__( + " .set push \n" + " .set arch=mips64r2 \n" + " dsbh %0, %1 \n" + " dshd %0, %0 \n" + " .set pop \n" + : "=r" (x) + : "r" (x)); + + return x; +} +#define __arch_swab64 __arch_swab64 +#endif /* __mips64 */ +#endif /* MIPS R2 or newer or Loongson 3A */ +#endif /* _ASM_SWAB_H */ |