These changes are the raw update to linux-4.4.6-rt14. Kernel sources

are taken from kernel.org, and rt patch from the rt wiki download page.

During the rebasing, the following patch collided:

Force tick interrupt and get rid of softirq magic(I70131fb85).

Collisions have been removed because its logic was found on the
source already.

Change-Id: I7f57a4081d9deaa0d9ccfc41a6c8daccdee3b769
Signed-off-by: José Pekkarinen <jose.pekkarinen@nokia.com>

20 files changed, 0 insertions, 1683 deletions

diff --git a/kernel/arch/mips/include/asm/mach-loongson/boot_param.h b/kernel/arch/mips/include/asm/mach-loongson/boot_param.h
deleted file mode 100644
index fa8029265..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/boot_param.h
+++ /dev/null
@@ -1,210 +0,0 @@
-#ifndef __ASM_MACH_LOONGSON_BOOT_PARAM_H_
-#define __ASM_MACH_LOONGSON_BOOT_PARAM_H_
-
-#define SYSTEM_RAM_LOW		1
-#define SYSTEM_RAM_HIGH		2
-#define MEM_RESERVED		3
-#define PCI_IO			4
-#define PCI_MEM			5
-#define LOONGSON_CFG_REG	6
-#define VIDEO_ROM		7
-#define ADAPTER_ROM		8
-#define ACPI_TABLE		9
-#define SMBIOS_TABLE		10
-#define MAX_MEMORY_TYPE		11
-
-#define LOONGSON3_BOOT_MEM_MAP_MAX 128
-struct efi_memory_map_loongson {
-	u16 vers;	/* version of efi_memory_map */
-	u32 nr_map;	/* number of memory_maps */
-	u32 mem_freq;	/* memory frequence */
-	struct mem_map {
-		u32 node_id;	/* node_id which memory attached to */
-		u32 mem_type;	/* system memory, pci memory, pci io, etc. */
-		u64 mem_start;	/* memory map start address */
-		u32 mem_size;	/* each memory_map size, not the total size */
-	} map[LOONGSON3_BOOT_MEM_MAP_MAX];
-} __packed;
-
-enum loongson_cpu_type {
-	Loongson_2E = 0,
-	Loongson_2F = 1,
-	Loongson_3A = 2,
-	Loongson_3B = 3,
-	Loongson_1A = 4,
-	Loongson_1B = 5
-};
-
-/*
- * Capability and feature descriptor structure for MIPS CPU
- */
-struct efi_cpuinfo_loongson {
-	u16 vers;     /* version of efi_cpuinfo_loongson */
-	u32 processor_id; /* PRID, e.g. 6305, 6306 */
-	u32 cputype;  /* Loongson_3A/3B, etc. */
-	u32 total_node;   /* num of total numa nodes */
-	u16 cpu_startup_core_id; /* Boot core id */
-	u16 reserved_cores_mask;
-	u32 cpu_clock_freq; /* cpu_clock */
-	u32 nr_cpus;
-} __packed;
-
-#define MAX_UARTS 64
-struct uart_device {
-	u32 iotype; /* see include/linux/serial_core.h */
-	u32 uartclk;
-	u32 int_offset;
-	u64 uart_base;
-} __packed;
-
-#define MAX_SENSORS 64
-#define SENSOR_TEMPER  0x00000001
-#define SENSOR_VOLTAGE 0x00000002
-#define SENSOR_FAN     0x00000004
-struct sensor_device {
-	char name[32];  /* a formal name */
-	char label[64]; /* a flexible description */
-	u32 type;       /* SENSOR_* */
-	u32 id;         /* instance id of a sensor-class */
-	u32 fan_policy; /* see loongson_hwmon.h */
-	u32 fan_percent;/* only for constant speed policy */
-	u64 base_addr;  /* base address of device registers */
-} __packed;
-
-struct system_loongson {
-	u16 vers;     /* version of system_loongson */
-	u32 ccnuma_smp; /* 0: no numa; 1: has numa */
-	u32 sing_double_channel; /* 1:single; 2:double */
-	u32 nr_uarts;
-	struct uart_device uarts[MAX_UARTS];
-	u32 nr_sensors;
-	struct sensor_device sensors[MAX_SENSORS];
-	char has_ec;
-	char ec_name[32];
-	u64 ec_base_addr;
-	char has_tcm;
-	char tcm_name[32];
-	u64 tcm_base_addr;
-	u64 workarounds; /* see workarounds.h */
-} __packed;
-
-struct irq_source_routing_table {
-	u16 vers;
-	u16 size;
-	u16 rtr_bus;
-	u16 rtr_devfn;
-	u32 vendor;
-	u32 device;
-	u32 PIC_type;   /* conform use HT or PCI to route to CPU-PIC */
-	u64 ht_int_bit; /* 3A: 1<<24; 3B: 1<<16 */
-	u64 ht_enable;  /* irqs used in this PIC */
-	u32 node_id;    /* node id: 0x0-0; 0x1-1; 0x10-2; 0x11-3 */
-	u64 pci_mem_start_addr;
-	u64 pci_mem_end_addr;
-	u64 pci_io_start_addr;
-	u64 pci_io_end_addr;
-	u64 pci_config_addr;
-	u32 dma_mask_bits;
-} __packed;
-
-struct interface_info {
-	u16 vers; /* version of the specificition */
-	u16 size;
-	u8  flag;
-	char description[64];
-} __packed;
-
-#define MAX_RESOURCE_NUMBER 128
-struct resource_loongson {
-	u64 start; /* resource start address */
-	u64 end;   /* resource end address */
-	char name[64];
-	u32 flags;
-};
-
-struct archdev_data {};  /* arch specific additions */
-
-struct board_devices {
-	char name[64];    /* hold the device name */
-	u32 num_resources; /* number of device_resource */
-	/* for each device's resource */
-	struct resource_loongson resource[MAX_RESOURCE_NUMBER];
-	/* arch specific additions */
-	struct archdev_data archdata;
-};
-
-struct loongson_special_attribute {
-	u16 vers;     /* version of this special */
-	char special_name[64]; /* special_atribute_name */
-	u32 loongson_special_type; /* type of special device */
-	/* for each device's resource */
-	struct resource_loongson resource[MAX_RESOURCE_NUMBER];
-};
-
-struct loongson_params {
-	u64 memory_offset;	/* efi_memory_map_loongson struct offset */
-	u64 cpu_offset;		/* efi_cpuinfo_loongson struct offset */
-	u64 system_offset;	/* system_loongson struct offset */
-	u64 irq_offset;		/* irq_source_routing_table struct offset */
-	u64 interface_offset;	/* interface_info struct offset */
-	u64 special_offset;	/* loongson_special_attribute struct offset */
-	u64 boarddev_table_offset;  /* board_devices offset */
-};
-
-struct smbios_tables {
-	u16 vers;     /* version of smbios */
-	u64 vga_bios; /* vga_bios address */
-	struct loongson_params lp;
-};
-
-struct efi_reset_system_t {
-	u64 ResetCold;
-	u64 ResetWarm;
-	u64 ResetType;
-	u64 Shutdown;
-	u64 DoSuspend; /* NULL if not support */
-};
-
-struct efi_loongson {
-	u64 mps;	/* MPS table */
-	u64 acpi;	/* ACPI table (IA64 ext 0.71) */
-	u64 acpi20;	/* ACPI table (ACPI 2.0) */
-	struct smbios_tables smbios;	/* SM BIOS table */
-	u64 sal_systab;	/* SAL system table */
-	u64 boot_info;	/* boot info table */
-};
-
-struct boot_params {
-	struct efi_loongson efi;
-	struct efi_reset_system_t reset_system;
-};
-
-struct loongson_system_configuration {
-	u32 nr_cpus;
-	u32 nr_nodes;
-	int cores_per_node;
-	int cores_per_package;
-	u16 boot_cpu_id;
-	u16 reserved_cpus_mask;
-	enum loongson_cpu_type cputype;
-	u64 ht_control_base;
-	u64 pci_mem_start_addr;
-	u64 pci_mem_end_addr;
-	u64 pci_io_base;
-	u64 restart_addr;
-	u64 poweroff_addr;
-	u64 suspend_addr;
-	u64 vgabios_addr;
-	u32 dma_mask_bits;
-	char ecname[32];
-	u32 nr_uarts;
-	struct uart_device uarts[MAX_UARTS];
-	u32 nr_sensors;
-	struct sensor_device sensors[MAX_SENSORS];
-	u64 workarounds;
-};
-
-extern struct efi_memory_map_loongson *loongson_memmap;
-extern struct loongson_system_configuration loongson_sysconf;
-
-#endif
diff --git a/kernel/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h b/kernel/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
deleted file mode 100644
index acc376897..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2009 Wu Zhangjin <wuzhangjin@gmail.com>
- * Copyright (C) 2009 Philippe Vachon <philippe@cowpig.ca>
- * Copyright (C) 2009 Zhang Le <r0bertz@gentoo.org>
- *
- * reference: /proc/cpuinfo,
- *	arch/mips/kernel/cpu-probe.c(cpu_probe_legacy),
- *	arch/mips/kernel/proc.c(show_cpuinfo),
- *	loongson2f user manual.
- */
-
-#ifndef __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H
-#define __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H
-
-#define cpu_dcache_line_size()	32
-#define cpu_icache_line_size()	32
-#define cpu_scache_line_size()	32
-
-
-#define cpu_has_32fpr		1
-#define cpu_has_3k_cache	0
-#define cpu_has_4k_cache	1
-#define cpu_has_4kex		1
-#define cpu_has_64bits		1
-#define cpu_has_cache_cdex_p	0
-#define cpu_has_cache_cdex_s	0
-#define cpu_has_counter		1
-#define cpu_has_dc_aliases	(PAGE_SIZE < 0x4000)
-#define cpu_has_divec		0
-#define cpu_has_dsp		0
-#define cpu_has_dsp2		0
-#define cpu_has_ejtag		0
-#define cpu_has_ic_fills_f_dc	0
-#define cpu_has_inclusive_pcaches	1
-#define cpu_has_llsc		1
-#define cpu_has_mcheck		0
-#define cpu_has_mdmx		0
-#define cpu_has_mips16		0
-#define cpu_has_mips32r2	0
-#define cpu_has_mips3d		0
-#define cpu_has_mips64r2	0
-#define cpu_has_mipsmt		0
-#define cpu_has_prefetch	0
-#define cpu_has_smartmips	0
-#define cpu_has_tlb		1
-#define cpu_has_tx39_cache	0
-#define cpu_has_userlocal	0
-#define cpu_has_vce		0
-#define cpu_has_veic		0
-#define cpu_has_vint		0
-#define cpu_has_vtag_icache	0
-#define cpu_has_watch		1
-#define cpu_has_local_ebase	0
-
-#define cpu_has_wsbh		IS_ENABLED(CONFIG_CPU_LOONGSON3)
-
-#endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */
diff --git a/kernel/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h b/kernel/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h
deleted file mode 100644
index a0ee0cb77..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h
+++ /dev/null
@@ -1,305 +0,0 @@
-/*
- * The header file of cs5536 south bridge.
- *
- * Copyright (C) 2007 Lemote, Inc.
- * Author : jlliu <liujl@lemote.com>
- */
-
-#ifndef _CS5536_H
-#define _CS5536_H
-
-#include <linux/types.h>
-
-extern void _rdmsr(u32 msr, u32 *hi, u32 *lo);
-extern void _wrmsr(u32 msr, u32 hi, u32 lo);
-
-/*
- * MSR module base
- */
-#define CS5536_SB_MSR_BASE	(0x00000000)
-#define CS5536_GLIU_MSR_BASE	(0x10000000)
-#define CS5536_ILLEGAL_MSR_BASE (0x20000000)
-#define CS5536_USB_MSR_BASE	(0x40000000)
-#define CS5536_IDE_MSR_BASE	(0x60000000)
-#define CS5536_DIVIL_MSR_BASE	(0x80000000)
-#define CS5536_ACC_MSR_BASE	(0xa0000000)
-#define CS5536_UNUSED_MSR_BASE	(0xc0000000)
-#define CS5536_GLCP_MSR_BASE	(0xe0000000)
-
-#define SB_MSR_REG(offset)	(CS5536_SB_MSR_BASE	| (offset))
-#define GLIU_MSR_REG(offset)	(CS5536_GLIU_MSR_BASE	| (offset))
-#define ILLEGAL_MSR_REG(offset) (CS5536_ILLEGAL_MSR_BASE | (offset))
-#define USB_MSR_REG(offset)	(CS5536_USB_MSR_BASE	| (offset))
-#define IDE_MSR_REG(offset)	(CS5536_IDE_MSR_BASE	| (offset))
-#define DIVIL_MSR_REG(offset)	(CS5536_DIVIL_MSR_BASE	| (offset))
-#define ACC_MSR_REG(offset)	(CS5536_ACC_MSR_BASE	| (offset))
-#define UNUSED_MSR_REG(offset)	(CS5536_UNUSED_MSR_BASE | (offset))
-#define GLCP_MSR_REG(offset)	(CS5536_GLCP_MSR_BASE	| (offset))
-
-/*
- * BAR SPACE OF VIRTUAL PCI :
- * range for pci probe use, length is the actual size.
- */
-/* IO space for all DIVIL modules */
-#define CS5536_IRQ_RANGE	0xffffffe0 /* USERD FOR PCI PROBE */
-#define CS5536_IRQ_LENGTH	0x20	/* THE REGS ACTUAL LENGTH */
-#define CS5536_SMB_RANGE	0xfffffff8
-#define CS5536_SMB_LENGTH	0x08
-#define CS5536_GPIO_RANGE	0xffffff00
-#define CS5536_GPIO_LENGTH	0x100
-#define CS5536_MFGPT_RANGE	0xffffffc0
-#define CS5536_MFGPT_LENGTH	0x40
-#define CS5536_ACPI_RANGE	0xffffffe0
-#define CS5536_ACPI_LENGTH	0x20
-#define CS5536_PMS_RANGE	0xffffff80
-#define CS5536_PMS_LENGTH	0x80
-/* IO space for IDE */
-#define CS5536_IDE_RANGE	0xfffffff0
-#define CS5536_IDE_LENGTH	0x10
-/* IO space for ACC */
-#define CS5536_ACC_RANGE	0xffffff80
-#define CS5536_ACC_LENGTH	0x80
-/* MEM space for ALL USB modules */
-#define CS5536_OHCI_RANGE	0xfffff000
-#define CS5536_OHCI_LENGTH	0x1000
-#define CS5536_EHCI_RANGE	0xfffff000
-#define CS5536_EHCI_LENGTH	0x1000
-
-/*
- * PCI MSR ACCESS
- */
-#define PCI_MSR_CTRL		0xF0
-#define PCI_MSR_ADDR		0xF4
-#define PCI_MSR_DATA_LO		0xF8
-#define PCI_MSR_DATA_HI		0xFC
-
-/**************** MSR *****************************/
-
-/*
- * GLIU STANDARD MSR
- */
-#define GLIU_CAP		0x00
-#define GLIU_CONFIG		0x01
-#define GLIU_SMI		0x02
-#define GLIU_ERROR		0x03
-#define GLIU_PM			0x04
-#define GLIU_DIAG		0x05
-
-/*
- * GLIU SPEC. MSR
- */
-#define GLIU_P2D_BM0		0x20
-#define GLIU_P2D_BM1		0x21
-#define GLIU_P2D_BM2		0x22
-#define GLIU_P2D_BMK0		0x23
-#define GLIU_P2D_BMK1		0x24
-#define GLIU_P2D_BM3		0x25
-#define GLIU_P2D_BM4		0x26
-#define GLIU_COH		0x80
-#define GLIU_PAE		0x81
-#define GLIU_ARB		0x82
-#define GLIU_ASMI		0x83
-#define GLIU_AERR		0x84
-#define GLIU_DEBUG		0x85
-#define GLIU_PHY_CAP		0x86
-#define GLIU_NOUT_RESP		0x87
-#define GLIU_NOUT_WDATA		0x88
-#define GLIU_WHOAMI		0x8B
-#define GLIU_SLV_DIS		0x8C
-#define GLIU_IOD_BM0		0xE0
-#define GLIU_IOD_BM1		0xE1
-#define GLIU_IOD_BM2		0xE2
-#define GLIU_IOD_BM3		0xE3
-#define GLIU_IOD_BM4		0xE4
-#define GLIU_IOD_BM5		0xE5
-#define GLIU_IOD_BM6		0xE6
-#define GLIU_IOD_BM7		0xE7
-#define GLIU_IOD_BM8		0xE8
-#define GLIU_IOD_BM9		0xE9
-#define GLIU_IOD_SC0		0xEA
-#define GLIU_IOD_SC1		0xEB
-#define GLIU_IOD_SC2		0xEC
-#define GLIU_IOD_SC3		0xED
-#define GLIU_IOD_SC4		0xEE
-#define GLIU_IOD_SC5		0xEF
-#define GLIU_IOD_SC6		0xF0
-#define GLIU_IOD_SC7		0xF1
-
-/*
- * SB STANDARD
- */
-#define SB_CAP		0x00
-#define SB_CONFIG	0x01
-#define SB_SMI		0x02
-#define SB_ERROR	0x03
-#define SB_MAR_ERR_EN		0x00000001
-#define SB_TAR_ERR_EN		0x00000002
-#define SB_RSVD_BIT1		0x00000004
-#define SB_EXCEP_ERR_EN		0x00000008
-#define SB_SYSE_ERR_EN		0x00000010
-#define SB_PARE_ERR_EN		0x00000020
-#define SB_TAS_ERR_EN		0x00000040
-#define SB_MAR_ERR_FLAG		0x00010000
-#define SB_TAR_ERR_FLAG		0x00020000
-#define SB_RSVD_BIT2		0x00040000
-#define SB_EXCEP_ERR_FLAG	0x00080000
-#define SB_SYSE_ERR_FLAG	0x00100000
-#define SB_PARE_ERR_FLAG	0x00200000
-#define SB_TAS_ERR_FLAG		0x00400000
-#define SB_PM		0x04
-#define SB_DIAG		0x05
-
-/*
- * SB SPEC.
- */
-#define SB_CTRL		0x10
-#define SB_R0		0x20
-#define SB_R1		0x21
-#define SB_R2		0x22
-#define SB_R3		0x23
-#define SB_R4		0x24
-#define SB_R5		0x25
-#define SB_R6		0x26
-#define SB_R7		0x27
-#define SB_R8		0x28
-#define SB_R9		0x29
-#define SB_R10		0x2A
-#define SB_R11		0x2B
-#define SB_R12		0x2C
-#define SB_R13		0x2D
-#define SB_R14		0x2E
-#define SB_R15		0x2F
-
-/*
- * GLCP STANDARD
- */
-#define GLCP_CAP		0x00
-#define GLCP_CONFIG		0x01
-#define GLCP_SMI		0x02
-#define GLCP_ERROR		0x03
-#define GLCP_PM			0x04
-#define GLCP_DIAG		0x05
-
-/*
- * GLCP SPEC.
- */
-#define GLCP_CLK_DIS_DELAY	0x08
-#define GLCP_PM_CLK_DISABLE	0x09
-#define GLCP_GLB_PM		0x0B
-#define GLCP_DBG_OUT		0x0C
-#define GLCP_RSVD1		0x0D
-#define GLCP_SOFT_COM		0x0E
-#define SOFT_BAR_SMB_FLAG	0x00000001
-#define SOFT_BAR_GPIO_FLAG	0x00000002
-#define SOFT_BAR_MFGPT_FLAG	0x00000004
-#define SOFT_BAR_IRQ_FLAG	0x00000008
-#define SOFT_BAR_PMS_FLAG	0x00000010
-#define SOFT_BAR_ACPI_FLAG	0x00000020
-#define SOFT_BAR_IDE_FLAG	0x00000400
-#define SOFT_BAR_ACC_FLAG	0x00000800
-#define SOFT_BAR_OHCI_FLAG	0x00001000
-#define SOFT_BAR_EHCI_FLAG	0x00002000
-#define GLCP_RSVD2		0x0F
-#define GLCP_CLK_OFF		0x10
-#define GLCP_CLK_ACTIVE		0x11
-#define GLCP_CLK_DISABLE	0x12
-#define GLCP_CLK4ACK		0x13
-#define GLCP_SYS_RST		0x14
-#define GLCP_RSVD3		0x15
-#define GLCP_DBG_CLK_CTRL	0x16
-#define GLCP_CHIP_REV_ID	0x17
-
-/* PIC */
-#define PIC_YSEL_LOW		0x20
-#define PIC_YSEL_LOW_USB_SHIFT		8
-#define PIC_YSEL_LOW_ACC_SHIFT		16
-#define PIC_YSEL_LOW_FLASH_SHIFT	24
-#define PIC_YSEL_HIGH		0x21
-#define PIC_ZSEL_LOW		0x22
-#define PIC_ZSEL_HIGH		0x23
-#define PIC_IRQM_PRIM		0x24
-#define PIC_IRQM_LPC		0x25
-#define PIC_XIRR_STS_LOW	0x26
-#define PIC_XIRR_STS_HIGH	0x27
-#define PCI_SHDW		0x34
-
-/*
- * DIVIL STANDARD
- */
-#define DIVIL_CAP		0x00
-#define DIVIL_CONFIG		0x01
-#define DIVIL_SMI		0x02
-#define DIVIL_ERROR		0x03
-#define DIVIL_PM		0x04
-#define DIVIL_DIAG		0x05
-
-/*
- * DIVIL SPEC.
- */
-#define DIVIL_LBAR_IRQ		0x08
-#define DIVIL_LBAR_KEL		0x09
-#define DIVIL_LBAR_SMB		0x0B
-#define DIVIL_LBAR_GPIO		0x0C
-#define DIVIL_LBAR_MFGPT	0x0D
-#define DIVIL_LBAR_ACPI		0x0E
-#define DIVIL_LBAR_PMS		0x0F
-#define DIVIL_LEG_IO		0x14
-#define DIVIL_BALL_OPTS		0x15
-#define DIVIL_SOFT_IRQ		0x16
-#define DIVIL_SOFT_RESET	0x17
-
-/* MFGPT */
-#define MFGPT_IRQ	0x28
-
-/*
- * IDE STANDARD
- */
-#define IDE_CAP		0x00
-#define IDE_CONFIG	0x01
-#define IDE_SMI		0x02
-#define IDE_ERROR	0x03
-#define IDE_PM		0x04
-#define IDE_DIAG	0x05
-
-/*
- * IDE SPEC.
- */
-#define IDE_IO_BAR	0x08
-#define IDE_CFG		0x10
-#define IDE_DTC		0x12
-#define IDE_CAST	0x13
-#define IDE_ETC		0x14
-#define IDE_INTERNAL_PM 0x15
-
-/*
- * ACC STANDARD
- */
-#define ACC_CAP		0x00
-#define ACC_CONFIG	0x01
-#define ACC_SMI		0x02
-#define ACC_ERROR	0x03
-#define ACC_PM		0x04
-#define ACC_DIAG	0x05
-
-/*
- * USB STANDARD
- */
-#define USB_CAP		0x00
-#define USB_CONFIG	0x01
-#define USB_SMI		0x02
-#define USB_ERROR	0x03
-#define USB_PM		0x04
-#define USB_DIAG	0x05
-
-/*
- * USB SPEC.
- */
-#define USB_OHCI	0x08
-#define USB_EHCI	0x09
-
-/****************** NATIVE ***************************/
-/* GPIO : I/O SPACE; REG : 32BITS */
-#define GPIOL_OUT_VAL		0x00
-#define GPIOL_OUT_EN		0x04
-
-#endif				/* _CS5536_H */
diff --git a/kernel/arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h b/kernel/arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h
deleted file mode 100644
index 021d0172d..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * cs5536 mfgpt header file
- */
-
-#ifndef _CS5536_MFGPT_H
-#define _CS5536_MFGPT_H
-
-#include <cs5536/cs5536.h>
-#include <cs5536/cs5536_pci.h>
-
-#ifdef CONFIG_CS5536_MFGPT
-extern void setup_mfgpt0_timer(void);
-extern void disable_mfgpt0_counter(void);
-extern void enable_mfgpt0_counter(void);
-#else
-static inline void __maybe_unused setup_mfgpt0_timer(void)
-{
-}
-static inline void __maybe_unused disable_mfgpt0_counter(void)
-{
-}
-static inline void __maybe_unused enable_mfgpt0_counter(void)
-{
-}
-#endif
-
-#define MFGPT_TICK_RATE 14318000
-#define COMPARE	 ((MFGPT_TICK_RATE + HZ/2) / HZ)
-
-#define MFGPT_BASE	mfgpt_base
-#define MFGPT0_CMP2	(MFGPT_BASE + 2)
-#define MFGPT0_CNT	(MFGPT_BASE + 4)
-#define MFGPT0_SETUP	(MFGPT_BASE + 6)
-
-#endif /*!_CS5536_MFGPT_H */
diff --git a/kernel/arch/mips/include/asm/mach-loongson/cs5536/cs5536_pci.h b/kernel/arch/mips/include/asm/mach-loongson/cs5536/cs5536_pci.h
deleted file mode 100644
index 8a7ecb4d5..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/cs5536/cs5536_pci.h
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * the definition file of cs5536 Virtual Support Module(VSM).
- * pci configuration space can be accessed through the VSM, so
- * there is no need of the MSR read/write now, except the spec.
- * MSR registers which are not implemented yet.
- *
- * Copyright (C) 2007 Lemote Inc.
- * Author : jlliu, liujl@lemote.com
- */
-
-#ifndef _CS5536_PCI_H
-#define _CS5536_PCI_H
-
-#include <linux/types.h>
-#include <linux/pci_regs.h>
-
-extern void cs5536_pci_conf_write4(int function, int reg, u32 value);
-extern u32 cs5536_pci_conf_read4(int function, int reg);
-
-#define CS5536_ACC_INTR		9
-#define CS5536_IDE_INTR		14
-#define CS5536_USB_INTR		11
-#define CS5536_MFGPT_INTR	5
-#define CS5536_UART1_INTR	4
-#define CS5536_UART2_INTR	3
-
-/************** PCI BUS DEVICE FUNCTION ***************/
-
-/*
- * PCI bus device function
- */
-#define PCI_BUS_CS5536		0
-#define PCI_IDSEL_CS5536	14
-
-/********** STANDARD PCI-2.2 EXPANSION ****************/
-
-/*
- * PCI configuration space
- * we have to virtualize the PCI configure space head, so we should
- * define the necessary IDs and some others.
- */
-
-/* CONFIG of PCI VENDOR ID*/
-#define CFG_PCI_VENDOR_ID(mod_dev_id, sys_vendor_id) \
-	(((mod_dev_id) << 16) | (sys_vendor_id))
-
-/* VENDOR ID */
-#define CS5536_VENDOR_ID	0x1022
-
-/* DEVICE ID */
-#define CS5536_ISA_DEVICE_ID		0x2090
-#define CS5536_IDE_DEVICE_ID		0x209a
-#define CS5536_ACC_DEVICE_ID		0x2093
-#define CS5536_OHCI_DEVICE_ID		0x2094
-#define CS5536_EHCI_DEVICE_ID		0x2095
-
-/* CLASS CODE : CLASS SUB-CLASS INTERFACE */
-#define CS5536_ISA_CLASS_CODE		0x060100
-#define CS5536_IDE_CLASS_CODE		0x010180
-#define CS5536_ACC_CLASS_CODE		0x040100
-#define CS5536_OHCI_CLASS_CODE		0x0C0310
-#define CS5536_EHCI_CLASS_CODE		0x0C0320
-
-/* BHLC : BIST HEADER-TYPE LATENCY-TIMER CACHE-LINE-SIZE */
-
-#define CFG_PCI_CACHE_LINE_SIZE(header_type, latency_timer)	\
-	((PCI_NONE_BIST << 24) | ((header_type) << 16) \
-		| ((latency_timer) << 8) | PCI_NORMAL_CACHE_LINE_SIZE);
-
-#define PCI_NONE_BIST			0x00	/* RO not implemented yet. */
-#define PCI_BRIDGE_HEADER_TYPE		0x80	/* RO */
-#define PCI_NORMAL_HEADER_TYPE		0x00
-#define PCI_NORMAL_LATENCY_TIMER	0x00
-#define PCI_NORMAL_CACHE_LINE_SIZE	0x08	/* RW */
-
-/* BAR */
-#define PCI_BAR0_REG			0x10
-#define PCI_BAR1_REG			0x14
-#define PCI_BAR2_REG			0x18
-#define PCI_BAR3_REG			0x1c
-#define PCI_BAR4_REG			0x20
-#define PCI_BAR5_REG			0x24
-#define PCI_BAR_COUNT			6
-#define PCI_BAR_RANGE_MASK		0xFFFFFFFF
-
-/* CARDBUS CIS POINTER */
-#define PCI_CARDBUS_CIS_POINTER		0x00000000
-
-/* SUBSYSTEM VENDOR ID	*/
-#define CS5536_SUB_VENDOR_ID		CS5536_VENDOR_ID
-
-/* SUBSYSTEM ID */
-#define CS5536_ISA_SUB_ID		CS5536_ISA_DEVICE_ID
-#define CS5536_IDE_SUB_ID		CS5536_IDE_DEVICE_ID
-#define CS5536_ACC_SUB_ID		CS5536_ACC_DEVICE_ID
-#define CS5536_OHCI_SUB_ID		CS5536_OHCI_DEVICE_ID
-#define CS5536_EHCI_SUB_ID		CS5536_EHCI_DEVICE_ID
-
-/* EXPANSION ROM BAR */
-#define PCI_EXPANSION_ROM_BAR		0x00000000
-
-/* CAPABILITIES POINTER */
-#define PCI_CAPLIST_POINTER		0x00000000
-#define PCI_CAPLIST_USB_POINTER		0x40
-/* INTERRUPT */
-
-#define CFG_PCI_INTERRUPT_LINE(pin, mod_intr) \
-	((PCI_MAX_LATENCY << 24) | (PCI_MIN_GRANT << 16) | \
-		((pin) << 8) | (mod_intr))
-
-#define PCI_MAX_LATENCY			0x40
-#define PCI_MIN_GRANT			0x00
-#define PCI_DEFAULT_PIN			0x01
-
-/*********** EXPANSION PCI REG ************************/
-
-/*
- * ISA EXPANSION
- */
-#define PCI_UART1_INT_REG	0x50
-#define PCI_UART2_INT_REG	0x54
-#define PCI_ISA_FIXUP_REG	0x58
-
-/*
- * IDE EXPANSION
- */
-#define PCI_IDE_CFG_REG		0x40
-#define CS5536_IDE_FLASH_SIGNATURE	0xDEADBEEF
-#define PCI_IDE_DTC_REG		0x48
-#define PCI_IDE_CAST_REG	0x4C
-#define PCI_IDE_ETC_REG		0x50
-#define PCI_IDE_PM_REG		0x54
-#define PCI_IDE_INT_REG		0x60
-
-/*
- * ACC EXPANSION
- */
-#define PCI_ACC_INT_REG		0x50
-
-/*
- * OHCI EXPANSION : INTTERUPT IS IMPLEMENTED BY THE OHCI
- */
-#define PCI_OHCI_PM_REG		0x40
-#define PCI_OHCI_INT_REG	0x50
-
-/*
- * EHCI EXPANSION
- */
-#define PCI_EHCI_LEGSMIEN_REG	0x50
-#define PCI_EHCI_LEGSMISTS_REG	0x54
-#define PCI_EHCI_FLADJ_REG	0x60
-
-#endif				/* _CS5536_PCI_H_ */
diff --git a/kernel/arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h b/kernel/arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h
deleted file mode 100644
index 1f17c1815..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * the read/write interfaces for Virtual Support Module(VSM)
- *
- * Copyright (C) 2009 Lemote, Inc.
- * Author: Wu Zhangjin <wuzhangjin@gmail.com>
- */
-
-#ifndef _CS5536_VSM_H
-#define _CS5536_VSM_H
-
-#include <linux/types.h>
-
-typedef void (*cs5536_pci_vsm_write)(int reg, u32 value);
-typedef u32 (*cs5536_pci_vsm_read)(int reg);
-
-#define DECLARE_CS5536_MODULE(name) \
-extern void pci_##name##_write_reg(int reg, u32 value); \
-extern u32 pci_##name##_read_reg(int reg);
-
-/* ide module */
-DECLARE_CS5536_MODULE(ide)
-/* acc module */
-DECLARE_CS5536_MODULE(acc)
-/* ohci module */
-DECLARE_CS5536_MODULE(ohci)
-/* isa module */
-DECLARE_CS5536_MODULE(isa)
-/* ehci module */
-DECLARE_CS5536_MODULE(ehci)
-
-#endif				/* _CS5536_VSM_H */
diff --git a/kernel/arch/mips/include/asm/mach-loongson/dma-coherence.h b/kernel/arch/mips/include/asm/mach-loongson/dma-coherence.h
deleted file mode 100644
index 4bf4e19f7..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/dma-coherence.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2006, 07  Ralf Baechle <ralf@linux-mips.org>
- * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
- * Author: Fuxin Zhang, zhangfx@lemote.com
- *
- */
-#ifndef __ASM_MACH_LOONGSON_DMA_COHERENCE_H
-#define __ASM_MACH_LOONGSON_DMA_COHERENCE_H
-
-#ifdef CONFIG_SWIOTLB
-#include <linux/swiotlb.h>
-#endif
-
-struct device;
-
-extern dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
-extern phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr);
-static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
-					  size_t size)
-{
-#ifdef CONFIG_CPU_LOONGSON3
-	return phys_to_dma(dev, virt_to_phys(addr));
-#else
-	return virt_to_phys(addr) | 0x80000000;
-#endif
-}
-
-static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
-					       struct page *page)
-{
-#ifdef CONFIG_CPU_LOONGSON3
-	return phys_to_dma(dev, page_to_phys(page));
-#else
-	return page_to_phys(page) | 0x80000000;
-#endif
-}
-
-static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
-	dma_addr_t dma_addr)
-{
-#if defined(CONFIG_CPU_LOONGSON3) && defined(CONFIG_64BIT)
-	return dma_to_phys(dev, dma_addr);
-#elif defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT)
-	return (dma_addr > 0x8fffffff) ? dma_addr : (dma_addr & 0x0fffffff);
-#else
-	return dma_addr & 0x7fffffff;
-#endif
-}
-
-static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
-	size_t size, enum dma_data_direction direction)
-{
-}
-
-static inline int plat_dma_supported(struct device *dev, u64 mask)
-{
-	/*
-	 * we fall back to GFP_DMA when the mask isn't all 1s,
-	 * so we can't guarantee allocations that must be
-	 * within a tighter range than GFP_DMA..
-	 */
-	if (mask < DMA_BIT_MASK(24))
-		return 0;
-
-	return 1;
-}
-
-static inline int plat_device_is_coherent(struct device *dev)
-{
-#ifdef CONFIG_DMA_NONCOHERENT
-	return 0;
-#else
-	return 1;
-#endif /* CONFIG_DMA_NONCOHERENT */
-}
-
-static inline void plat_post_dma_flush(struct device *dev)
-{
-}
-
-#endif /* __ASM_MACH_LOONGSON_DMA_COHERENCE_H */
diff --git a/kernel/arch/mips/include/asm/mach-loongson/gpio.h b/kernel/arch/mips/include/asm/mach-loongson/gpio.h
deleted file mode 100644
index b3b216904..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/gpio.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Loongson GPIO Support
- *
- * Copyright (c) 2008  Richard Liu, STMicroelectronics <richard.liu@st.com>
- * Copyright (c) 2008-2010  Arnaud Patard <apatard@mandriva.com>
- * Copyright (c) 2014  Huacai Chen <chenhc@lemote.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef __LOONGSON_GPIO_H
-#define __LOONGSON_GPIO_H
-
-#include <asm-generic/gpio.h>
-
-#define gpio_get_value __gpio_get_value
-#define gpio_set_value __gpio_set_value
-#define gpio_cansleep __gpio_cansleep
-
-/* The chip can do interrupt
- * but it has not been tested and doc not clear
- */
-static inline int gpio_to_irq(int gpio)
-{
-	return -EINVAL;
-}
-
-static inline int irq_to_gpio(int gpio)
-{
-	return -EINVAL;
-}
-
-#endif	/* __LOONGSON_GPIO_H */
diff --git a/kernel/arch/mips/include/asm/mach-loongson/irq.h b/kernel/arch/mips/include/asm/mach-loongson/irq.h
deleted file mode 100644
index a281cca5f..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/irq.h
+++ /dev/null
@@ -1,43 +0,0 @@
-#ifndef __ASM_MACH_LOONGSON_IRQ_H_
-#define __ASM_MACH_LOONGSON_IRQ_H_
-
-#include <boot_param.h>
-
-#ifdef CONFIG_CPU_LOONGSON3
-
-/* cpu core interrupt numbers */
-#define MIPS_CPU_IRQ_BASE 56
-
-#define LOONGSON_UART_IRQ   (MIPS_CPU_IRQ_BASE + 2) /* UART */
-#define LOONGSON_HT1_IRQ    (MIPS_CPU_IRQ_BASE + 3) /* HT1 */
-#define LOONGSON_TIMER_IRQ  (MIPS_CPU_IRQ_BASE + 7) /* CPU Timer */
-
-#define LOONGSON_HT1_CFG_BASE		loongson_sysconf.ht_control_base
-#define LOONGSON_HT1_INT_VECTOR_BASE	(LOONGSON_HT1_CFG_BASE + 0x80)
-#define LOONGSON_HT1_INT_EN_BASE	(LOONGSON_HT1_CFG_BASE + 0xa0)
-#define LOONGSON_HT1_INT_VECTOR(n)	\
-		LOONGSON3_REG32(LOONGSON_HT1_INT_VECTOR_BASE, 4 * (n))
-#define LOONGSON_HT1_INTN_EN(n)		\
-		LOONGSON3_REG32(LOONGSON_HT1_INT_EN_BASE, 4 * (n))
-
-#define LOONGSON_INT_ROUTER_OFFSET	0x1400
-#define LOONGSON_INT_ROUTER_INTEN	\
-	  LOONGSON3_REG32(LOONGSON3_REG_BASE, LOONGSON_INT_ROUTER_OFFSET + 0x24)
-#define LOONGSON_INT_ROUTER_INTENSET	\
-	  LOONGSON3_REG32(LOONGSON3_REG_BASE, LOONGSON_INT_ROUTER_OFFSET + 0x28)
-#define LOONGSON_INT_ROUTER_INTENCLR	\
-	  LOONGSON3_REG32(LOONGSON3_REG_BASE, LOONGSON_INT_ROUTER_OFFSET + 0x2c)
-#define LOONGSON_INT_ROUTER_ENTRY(n)	\
-	  LOONGSON3_REG8(LOONGSON3_REG_BASE, LOONGSON_INT_ROUTER_OFFSET + n)
-#define LOONGSON_INT_ROUTER_LPC		LOONGSON_INT_ROUTER_ENTRY(0x0a)
-#define LOONGSON_INT_ROUTER_HT1(n)	LOONGSON_INT_ROUTER_ENTRY(n + 0x18)
-
-#define LOONGSON_INT_COREx_INTy(x, y)	(1<<(x) | 1<<(y+4))	/* route to int y of core x */
-
-#endif
-
-extern void fixup_irqs(void);
-extern void loongson3_ipi_interrupt(struct pt_regs *regs);
-
-#include_next <irq.h>
-#endif /* __ASM_MACH_LOONGSON_IRQ_H_ */
diff --git a/kernel/arch/mips/include/asm/mach-loongson/kernel-entry-init.h b/kernel/arch/mips/include/asm/mach-loongson/kernel-entry-init.h
deleted file mode 100644
index df5fca8ee..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/kernel-entry-init.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2005 Embedded Alley Solutions, Inc
- * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
- * Copyright (C) 2009 Jiajie Chen (chenjiajie@cse.buaa.edu.cn)
- * Copyright (C) 2012 Huacai Chen (chenhc@lemote.com)
- */
-#ifndef __ASM_MACH_LOONGSON_KERNEL_ENTRY_H
-#define __ASM_MACH_LOONGSON_KERNEL_ENTRY_H
-
-/*
- * Override macros used in arch/mips/kernel/head.S.
- */
-	.macro	kernel_entry_setup
-#ifdef CONFIG_CPU_LOONGSON3
-	.set	push
-	.set	mips64
-	/* Set LPA on LOONGSON3 config3 */
-	mfc0	t0, $16, 3
-	or	t0, (0x1 << 7)
-	mtc0	t0, $16, 3
-	/* Set ELPA on LOONGSON3 pagegrain */
-	li	t0, (0x1 << 29)
-	mtc0	t0, $5, 1
-	_ehb
-	.set	pop
-#endif
-	.endm
-
-/*
- * Do SMP slave processor setup.
- */
-	.macro	smp_slave_setup
-#ifdef CONFIG_CPU_LOONGSON3
-	.set	push
-	.set	mips64
-	/* Set LPA on LOONGSON3 config3 */
-	mfc0	t0, $16, 3
-	or	t0, (0x1 << 7)
-	mtc0	t0, $16, 3
-	/* Set ELPA on LOONGSON3 pagegrain */
-	li	t0, (0x1 << 29)
-	mtc0	t0, $5, 1
-	_ehb
-	.set	pop
-#endif
-	.endm
-
-#endif /* __ASM_MACH_LOONGSON_KERNEL_ENTRY_H */
diff --git a/kernel/arch/mips/include/asm/mach-loongson/loongson.h b/kernel/arch/mips/include/asm/mach-loongson/loongson.h
deleted file mode 100644
index 9783103fd..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/loongson.h
+++ /dev/null
@@ -1,360 +0,0 @@
-/*
- * Copyright (C) 2009 Lemote, Inc.
- * Author: Wu Zhangjin <wuzhangjin@gmail.com>
- *
- * This program is free software; you can redistribute	it and/or modify it
- * under  the terms of	the GNU General	 Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#ifndef __ASM_MACH_LOONGSON_LOONGSON_H
-#define __ASM_MACH_LOONGSON_LOONGSON_H
-
-#include <linux/io.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/kconfig.h>
-#include <boot_param.h>
-
-/* loongson internal northbridge initialization */
-extern void bonito_irq_init(void);
-
-/* machine-specific reboot/halt operation */
-extern void mach_prepare_reboot(void);
-extern void mach_prepare_shutdown(void);
-
-/* environment arguments from bootloader */
-extern u32 cpu_clock_freq;
-extern u32 memsize, highmemsize;
-extern struct plat_smp_ops loongson3_smp_ops;
-
-/* loongson-specific command line, env and memory initialization */
-extern void __init prom_init_memory(void);
-extern void __init prom_init_cmdline(void);
-extern void __init prom_init_machtype(void);
-extern void __init prom_init_env(void);
-#ifdef CONFIG_LOONGSON_UART_BASE
-extern unsigned long _loongson_uart_base[], loongson_uart_base[];
-extern void prom_init_loongson_uart_base(void);
-#endif
-
-static inline void prom_init_uart_base(void)
-{
-#ifdef CONFIG_LOONGSON_UART_BASE
-	prom_init_loongson_uart_base();
-#endif
-}
-
-/* irq operation functions */
-extern void bonito_irqdispatch(void);
-extern void __init bonito_irq_init(void);
-extern void __init mach_init_irq(void);
-extern void mach_irq_dispatch(unsigned int pending);
-extern int mach_i8259_irq(void);
-
-/* We need this in some places... */
-#define delay() ({		\
-	int x;				\
-	for (x = 0; x < 100000; x++)	\
-		__asm__ __volatile__(""); \
-})
-
-#define LOONGSON_REG(x) \
-	(*(volatile u32 *)((char *)CKSEG1ADDR(LOONGSON_REG_BASE) + (x)))
-
-#define LOONGSON3_REG8(base, x) \
-	(*(volatile u8 *)((char *)TO_UNCAC(base) + (x)))
-
-#define LOONGSON3_REG32(base, x) \
-	(*(volatile u32 *)((char *)TO_UNCAC(base) + (x)))
-
-#define LOONGSON_IRQ_BASE	32
-#define LOONGSON2_PERFCNT_IRQ	(MIPS_CPU_IRQ_BASE + 6) /* cpu perf counter */
-
-#include <linux/interrupt.h>
-static inline void do_perfcnt_IRQ(void)
-{
-#if IS_ENABLED(CONFIG_OPROFILE)
-	do_IRQ(LOONGSON2_PERFCNT_IRQ);
-#endif
-}
-
-#define LOONGSON_FLASH_BASE	0x1c000000
-#define LOONGSON_FLASH_SIZE	0x02000000	/* 32M */
-#define LOONGSON_FLASH_TOP	(LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1)
-
-#define LOONGSON_LIO0_BASE	0x1e000000
-#define LOONGSON_LIO0_SIZE	0x01C00000	/* 28M */
-#define LOONGSON_LIO0_TOP	(LOONGSON_LIO0_BASE+LOONGSON_LIO0_SIZE-1)
-
-#define LOONGSON_BOOT_BASE	0x1fc00000
-#define LOONGSON_BOOT_SIZE	0x00100000	/* 1M */
-#define LOONGSON_BOOT_TOP	(LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1)
-#define LOONGSON_REG_BASE	0x1fe00000
-#define LOONGSON_REG_SIZE	0x00100000	/* 256Bytes + 256Bytes + ??? */
-#define LOONGSON_REG_TOP	(LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1)
-/* Loongson-3 specific registers */
-#define LOONGSON3_REG_BASE	0x3ff00000
-#define LOONGSON3_REG_SIZE	0x00100000	/* 256Bytes + 256Bytes + ??? */
-#define LOONGSON3_REG_TOP	(LOONGSON3_REG_BASE+LOONGSON3_REG_SIZE-1)
-
-#define LOONGSON_LIO1_BASE	0x1ff00000
-#define LOONGSON_LIO1_SIZE	0x00100000	/* 1M */
-#define LOONGSON_LIO1_TOP	(LOONGSON_LIO1_BASE+LOONGSON_LIO1_SIZE-1)
-
-#define LOONGSON_PCILO0_BASE	0x10000000
-#define LOONGSON_PCILO1_BASE	0x14000000
-#define LOONGSON_PCILO2_BASE	0x18000000
-#define LOONGSON_PCILO_BASE	LOONGSON_PCILO0_BASE
-#define LOONGSON_PCILO_SIZE	0x0c000000	/* 64M * 3 */
-#define LOONGSON_PCILO_TOP	(LOONGSON_PCILO0_BASE+LOONGSON_PCILO_SIZE-1)
-
-#define LOONGSON_PCICFG_BASE	0x1fe80000
-#define LOONGSON_PCICFG_SIZE	0x00000800	/* 2K */
-#define LOONGSON_PCICFG_TOP	(LOONGSON_PCICFG_BASE+LOONGSON_PCICFG_SIZE-1)
-
-#if defined(CONFIG_HT_PCI)
-#define LOONGSON_PCIIO_BASE	loongson_sysconf.pci_io_base
-#else
-#define LOONGSON_PCIIO_BASE	0x1fd00000
-#endif
-
-#define LOONGSON_PCIIO_SIZE	0x00100000	/* 1M */
-#define LOONGSON_PCIIO_TOP	(LOONGSON_PCIIO_BASE+LOONGSON_PCIIO_SIZE-1)
-
-/* Loongson Register Bases */
-
-#define LOONGSON_PCICONFIGBASE	0x00
-#define LOONGSON_REGBASE	0x100
-
-/* PCI Configuration Registers */
-
-#define LOONGSON_PCI_REG(x)	LOONGSON_REG(LOONGSON_PCICONFIGBASE + (x))
-#define LOONGSON_PCIDID		LOONGSON_PCI_REG(0x00)
-#define LOONGSON_PCICMD		LOONGSON_PCI_REG(0x04)
-#define LOONGSON_PCICLASS	LOONGSON_PCI_REG(0x08)
-#define LOONGSON_PCILTIMER	LOONGSON_PCI_REG(0x0c)
-#define LOONGSON_PCIBASE0	LOONGSON_PCI_REG(0x10)
-#define LOONGSON_PCIBASE1	LOONGSON_PCI_REG(0x14)
-#define LOONGSON_PCIBASE2	LOONGSON_PCI_REG(0x18)
-#define LOONGSON_PCIBASE3	LOONGSON_PCI_REG(0x1c)
-#define LOONGSON_PCIBASE4	LOONGSON_PCI_REG(0x20)
-#define LOONGSON_PCIEXPRBASE	LOONGSON_PCI_REG(0x30)
-#define LOONGSON_PCIINT		LOONGSON_PCI_REG(0x3c)
-
-#define LOONGSON_PCI_ISR4C	LOONGSON_PCI_REG(0x4c)
-
-#define LOONGSON_PCICMD_PERR_CLR	0x80000000
-#define LOONGSON_PCICMD_SERR_CLR	0x40000000
-#define LOONGSON_PCICMD_MABORT_CLR	0x20000000
-#define LOONGSON_PCICMD_MTABORT_CLR	0x10000000
-#define LOONGSON_PCICMD_TABORT_CLR	0x08000000
-#define LOONGSON_PCICMD_MPERR_CLR	0x01000000
-#define LOONGSON_PCICMD_PERRRESPEN	0x00000040
-#define LOONGSON_PCICMD_ASTEPEN		0x00000080
-#define LOONGSON_PCICMD_SERREN		0x00000100
-#define LOONGSON_PCILTIMER_BUSLATENCY	0x0000ff00
-#define LOONGSON_PCILTIMER_BUSLATENCY_SHIFT	8
-
-/* Loongson h/w Configuration */
-
-#define LOONGSON_GENCFG_OFFSET		0x4
-#define LOONGSON_GENCFG LOONGSON_REG(LOONGSON_REGBASE + LOONGSON_GENCFG_OFFSET)
-
-#define LOONGSON_GENCFG_DEBUGMODE	0x00000001
-#define LOONGSON_GENCFG_SNOOPEN		0x00000002
-#define LOONGSON_GENCFG_CPUSELFRESET	0x00000004
-
-#define LOONGSON_GENCFG_FORCE_IRQA	0x00000008
-#define LOONGSON_GENCFG_IRQA_ISOUT	0x00000010
-#define LOONGSON_GENCFG_IRQA_FROM_INT1	0x00000020
-#define LOONGSON_GENCFG_BYTESWAP	0x00000040
-
-#define LOONGSON_GENCFG_UNCACHED	0x00000080
-#define LOONGSON_GENCFG_PREFETCHEN	0x00000100
-#define LOONGSON_GENCFG_WBEHINDEN	0x00000200
-#define LOONGSON_GENCFG_CACHEALG	0x00000c00
-#define LOONGSON_GENCFG_CACHEALG_SHIFT	10
-#define LOONGSON_GENCFG_PCIQUEUE	0x00001000
-#define LOONGSON_GENCFG_CACHESTOP	0x00002000
-#define LOONGSON_GENCFG_MSTRBYTESWAP	0x00004000
-#define LOONGSON_GENCFG_BUSERREN	0x00008000
-#define LOONGSON_GENCFG_NORETRYTIMEOUT	0x00010000
-#define LOONGSON_GENCFG_SHORTCOPYTIMEOUT	0x00020000
-
-/* PCI address map control */
-
-#define LOONGSON_PCIMAP			LOONGSON_REG(LOONGSON_REGBASE + 0x10)
-#define LOONGSON_PCIMEMBASECFG		LOONGSON_REG(LOONGSON_REGBASE + 0x14)
-#define LOONGSON_PCIMAP_CFG		LOONGSON_REG(LOONGSON_REGBASE + 0x18)
-
-/* GPIO Regs - r/w */
-
-#define LOONGSON_GPIODATA		LOONGSON_REG(LOONGSON_REGBASE + 0x1c)
-#define LOONGSON_GPIOIE			LOONGSON_REG(LOONGSON_REGBASE + 0x20)
-
-/* ICU Configuration Regs - r/w */
-
-#define LOONGSON_INTEDGE		LOONGSON_REG(LOONGSON_REGBASE + 0x24)
-#define LOONGSON_INTSTEER		LOONGSON_REG(LOONGSON_REGBASE + 0x28)
-#define LOONGSON_INTPOL			LOONGSON_REG(LOONGSON_REGBASE + 0x2c)
-
-/* ICU Enable Regs - IntEn & IntISR are r/o. */
-
-#define LOONGSON_INTENSET		LOONGSON_REG(LOONGSON_REGBASE + 0x30)
-#define LOONGSON_INTENCLR		LOONGSON_REG(LOONGSON_REGBASE + 0x34)
-#define LOONGSON_INTEN			LOONGSON_REG(LOONGSON_REGBASE + 0x38)
-#define LOONGSON_INTISR			LOONGSON_REG(LOONGSON_REGBASE + 0x3c)
-
-/* ICU */
-#define LOONGSON_ICU_MBOXES		0x0000000f
-#define LOONGSON_ICU_MBOXES_SHIFT	0
-#define LOONGSON_ICU_DMARDY		0x00000010
-#define LOONGSON_ICU_DMAEMPTY		0x00000020
-#define LOONGSON_ICU_COPYRDY		0x00000040
-#define LOONGSON_ICU_COPYEMPTY		0x00000080
-#define LOONGSON_ICU_COPYERR		0x00000100
-#define LOONGSON_ICU_PCIIRQ		0x00000200
-#define LOONGSON_ICU_MASTERERR		0x00000400
-#define LOONGSON_ICU_SYSTEMERR		0x00000800
-#define LOONGSON_ICU_DRAMPERR		0x00001000
-#define LOONGSON_ICU_RETRYERR		0x00002000
-#define LOONGSON_ICU_GPIOS		0x01ff0000
-#define LOONGSON_ICU_GPIOS_SHIFT		16
-#define LOONGSON_ICU_GPINS		0x7e000000
-#define LOONGSON_ICU_GPINS_SHIFT		25
-#define LOONGSON_ICU_MBOX(N)		(1<<(LOONGSON_ICU_MBOXES_SHIFT+(N)))
-#define LOONGSON_ICU_GPIO(N)		(1<<(LOONGSON_ICU_GPIOS_SHIFT+(N)))
-#define LOONGSON_ICU_GPIN(N)		(1<<(LOONGSON_ICU_GPINS_SHIFT+(N)))
-
-/* PCI prefetch window base & mask */
-
-#define LOONGSON_MEM_WIN_BASE_L		LOONGSON_REG(LOONGSON_REGBASE + 0x40)
-#define LOONGSON_MEM_WIN_BASE_H		LOONGSON_REG(LOONGSON_REGBASE + 0x44)
-#define LOONGSON_MEM_WIN_MASK_L		LOONGSON_REG(LOONGSON_REGBASE + 0x48)
-#define LOONGSON_MEM_WIN_MASK_H		LOONGSON_REG(LOONGSON_REGBASE + 0x4c)
-
-/* PCI_Hit*_Sel_* */
-
-#define LOONGSON_PCI_HIT0_SEL_L		LOONGSON_REG(LOONGSON_REGBASE + 0x50)
-#define LOONGSON_PCI_HIT0_SEL_H		LOONGSON_REG(LOONGSON_REGBASE + 0x54)
-#define LOONGSON_PCI_HIT1_SEL_L		LOONGSON_REG(LOONGSON_REGBASE + 0x58)
-#define LOONGSON_PCI_HIT1_SEL_H		LOONGSON_REG(LOONGSON_REGBASE + 0x5c)
-#define LOONGSON_PCI_HIT2_SEL_L		LOONGSON_REG(LOONGSON_REGBASE + 0x60)
-#define LOONGSON_PCI_HIT2_SEL_H		LOONGSON_REG(LOONGSON_REGBASE + 0x64)
-
-/* PXArb Config & Status */
-
-#define LOONGSON_PXARB_CFG		LOONGSON_REG(LOONGSON_REGBASE + 0x68)
-#define LOONGSON_PXARB_STATUS		LOONGSON_REG(LOONGSON_REGBASE + 0x6c)
-
-#define MAX_PACKAGES 4
-
-/* Chip Config registor of each physical cpu package, PRid >= Loongson-2F */
-extern u64 loongson_chipcfg[MAX_PACKAGES];
-#define LOONGSON_CHIPCFG(id) (*(volatile u32 *)(loongson_chipcfg[id]))
-
-/* Chip Temperature registor of each physical cpu package, PRid >= Loongson-3A */
-extern u64 loongson_chiptemp[MAX_PACKAGES];
-#define LOONGSON_CHIPTEMP(id) (*(volatile u32 *)(loongson_chiptemp[id]))
-
-/* Freq Control register of each physical cpu package, PRid >= Loongson-3B */
-extern u64 loongson_freqctrl[MAX_PACKAGES];
-#define LOONGSON_FREQCTRL(id) (*(volatile u32 *)(loongson_freqctrl[id]))
-
-/* pcimap */
-
-#define LOONGSON_PCIMAP_PCIMAP_LO0	0x0000003f
-#define LOONGSON_PCIMAP_PCIMAP_LO0_SHIFT	0
-#define LOONGSON_PCIMAP_PCIMAP_LO1	0x00000fc0
-#define LOONGSON_PCIMAP_PCIMAP_LO1_SHIFT	6
-#define LOONGSON_PCIMAP_PCIMAP_LO2	0x0003f000
-#define LOONGSON_PCIMAP_PCIMAP_LO2_SHIFT	12
-#define LOONGSON_PCIMAP_PCIMAP_2	0x00040000
-#define LOONGSON_PCIMAP_WIN(WIN, ADDR)	\
-	((((ADDR)>>26) & LOONGSON_PCIMAP_PCIMAP_LO0) << ((WIN)*6))
-
-#ifdef CONFIG_CPU_SUPPORTS_CPUFREQ
-#include <linux/cpufreq.h>
-extern struct cpufreq_frequency_table loongson2_clockmod_table[];
-#endif
-
-/*
- * address windows configuration module
- *
- * loongson2e do not have this module
- */
-#ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG
-
-/* address window config module base address */
-#define LOONGSON_ADDRWINCFG_BASE		0x3ff00000ul
-#define LOONGSON_ADDRWINCFG_SIZE		0x180
-
-extern unsigned long _loongson_addrwincfg_base;
-#define LOONGSON_ADDRWINCFG(offset) \
-	(*(volatile u64 *)(_loongson_addrwincfg_base + (offset)))
-
-#define CPU_WIN0_BASE	LOONGSON_ADDRWINCFG(0x00)
-#define CPU_WIN1_BASE	LOONGSON_ADDRWINCFG(0x08)
-#define CPU_WIN2_BASE	LOONGSON_ADDRWINCFG(0x10)
-#define CPU_WIN3_BASE	LOONGSON_ADDRWINCFG(0x18)
-
-#define CPU_WIN0_MASK	LOONGSON_ADDRWINCFG(0x20)
-#define CPU_WIN1_MASK	LOONGSON_ADDRWINCFG(0x28)
-#define CPU_WIN2_MASK	LOONGSON_ADDRWINCFG(0x30)
-#define CPU_WIN3_MASK	LOONGSON_ADDRWINCFG(0x38)
-
-#define CPU_WIN0_MMAP	LOONGSON_ADDRWINCFG(0x40)
-#define CPU_WIN1_MMAP	LOONGSON_ADDRWINCFG(0x48)
-#define CPU_WIN2_MMAP	LOONGSON_ADDRWINCFG(0x50)
-#define CPU_WIN3_MMAP	LOONGSON_ADDRWINCFG(0x58)
-
-#define PCIDMA_WIN0_BASE	LOONGSON_ADDRWINCFG(0x60)
-#define PCIDMA_WIN1_BASE	LOONGSON_ADDRWINCFG(0x68)
-#define PCIDMA_WIN2_BASE	LOONGSON_ADDRWINCFG(0x70)
-#define PCIDMA_WIN3_BASE	LOONGSON_ADDRWINCFG(0x78)
-
-#define PCIDMA_WIN0_MASK	LOONGSON_ADDRWINCFG(0x80)
-#define PCIDMA_WIN1_MASK	LOONGSON_ADDRWINCFG(0x88)
-#define PCIDMA_WIN2_MASK	LOONGSON_ADDRWINCFG(0x90)
-#define PCIDMA_WIN3_MASK	LOONGSON_ADDRWINCFG(0x98)
-
-#define PCIDMA_WIN0_MMAP	LOONGSON_ADDRWINCFG(0xa0)
-#define PCIDMA_WIN1_MMAP	LOONGSON_ADDRWINCFG(0xa8)
-#define PCIDMA_WIN2_MMAP	LOONGSON_ADDRWINCFG(0xb0)
-#define PCIDMA_WIN3_MMAP	LOONGSON_ADDRWINCFG(0xb8)
-
-#define ADDRWIN_WIN0	0
-#define ADDRWIN_WIN1	1
-#define ADDRWIN_WIN2	2
-#define ADDRWIN_WIN3	3
-
-#define ADDRWIN_MAP_DST_DDR	0
-#define ADDRWIN_MAP_DST_PCI	1
-#define ADDRWIN_MAP_DST_LIO	1
-
-/*
- * s: CPU, PCIDMA
- * d: DDR, PCI, LIO
- * win: 0, 1, 2, 3
- * src: map source
- * dst: map destination
- * size: ~mask + 1
- */
-#define LOONGSON_ADDRWIN_CFG(s, d, w, src, dst, size) do {\
-	s##_WIN##w##_BASE = (src); \
-	s##_WIN##w##_MMAP = (dst) | ADDRWIN_MAP_DST_##d; \
-	s##_WIN##w##_MASK = ~(size-1); \
-} while (0)
-
-#define LOONGSON_ADDRWIN_CPUTOPCI(win, src, dst, size) \
-	LOONGSON_ADDRWIN_CFG(CPU, PCI, win, src, dst, size)
-#define LOONGSON_ADDRWIN_CPUTODDR(win, src, dst, size) \
-	LOONGSON_ADDRWIN_CFG(CPU, DDR, win, src, dst, size)
-#define LOONGSON_ADDRWIN_PCITODDR(win, src, dst, size) \
-	LOONGSON_ADDRWIN_CFG(PCIDMA, DDR, win, src, dst, size)
-
-#endif	/* ! CONFIG_CPU_SUPPORTS_ADDRWINCFG */
-
-#endif /* __ASM_MACH_LOONGSON_LOONGSON_H */
diff --git a/kernel/arch/mips/include/asm/mach-loongson/loongson_hwmon.h b/kernel/arch/mips/include/asm/mach-loongson/loongson_hwmon.h
deleted file mode 100644
index 4431fc54a..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/loongson_hwmon.h
+++ /dev/null
@@ -1,55 +0,0 @@
-#ifndef __LOONGSON_HWMON_H_
-#define __LOONGSON_HWMON_H_
-
-#include <linux/types.h>
-
-#define MIN_TEMP	0
-#define MAX_TEMP	255
-#define NOT_VALID_TEMP	999
-
-typedef int (*get_temp_fun)(int);
-extern int loongson3_cpu_temp(int);
-
-/* 0:Max speed, 1:Manual, 2:Auto */
-enum fan_control_mode {
-	FAN_FULL_MODE = 0,
-	FAN_MANUAL_MODE = 1,
-	FAN_AUTO_MODE = 2,
-	FAN_MODE_END
-};
-
-struct temp_range {
-	u8 low;
-	u8 high;
-	u8 level;
-};
-
-#define CONSTANT_SPEED_POLICY	0  /* at constent speed */
-#define STEP_SPEED_POLICY	1  /* use up/down arrays to describe policy */
-#define KERNEL_HELPER_POLICY	2  /* kernel as a helper to fan control */
-
-#define MAX_STEP_NUM	16
-#define MAX_FAN_LEVEL	255
-
-/* loongson_fan_policy works when fan work at FAN_AUTO_MODE */
-struct loongson_fan_policy {
-	u8	type;
-
-	/* percent only used when type is CONSTANT_SPEED_POLICY */
-	u8	percent;
-
-	/* period between two check. (Unit: S) */
-	u8	adjust_period;
-
-	/* fan adjust usually depend on a temprature input */
-	get_temp_fun	depend_temp;
-
-	/* up_step/down_step used when type is STEP_SPEED_POLICY */
-	u8	up_step_num;
-	u8	down_step_num;
-	struct temp_range up_step[MAX_STEP_NUM];
-	struct temp_range down_step[MAX_STEP_NUM];
-	struct delayed_work work;
-};
-
-#endif /* __LOONGSON_HWMON_H_*/
diff --git a/kernel/arch/mips/include/asm/mach-loongson/machine.h b/kernel/arch/mips/include/asm/mach-loongson/machine.h
deleted file mode 100644
index cb2b60249..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/machine.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * Copyright (C) 2009 Lemote, Inc.
- * Author: Wu Zhangjin <wuzhangjin@gmail.com>
- *
- * This program is free software; you can redistribute	it and/or modify it
- * under  the terms of	the GNU General	 Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#ifndef __ASM_MACH_LOONGSON_MACHINE_H
-#define __ASM_MACH_LOONGSON_MACHINE_H
-
-#ifdef CONFIG_LEMOTE_FULOONG2E
-
-#define LOONGSON_MACHTYPE MACH_LEMOTE_FL2E
-
-#endif
-
-/* use fuloong2f as the default machine of LEMOTE_MACH2F */
-#ifdef CONFIG_LEMOTE_MACH2F
-
-#define LOONGSON_MACHTYPE MACH_LEMOTE_FL2F
-
-#endif
-
-#ifdef CONFIG_LOONGSON_MACH3X
-
-#define LOONGSON_MACHTYPE MACH_LOONGSON_GENERIC
-
-#endif /* CONFIG_LOONGSON_MACH3X */
-
-#endif /* __ASM_MACH_LOONGSON_MACHINE_H */
diff --git a/kernel/arch/mips/include/asm/mach-loongson/mc146818rtc.h b/kernel/arch/mips/include/asm/mach-loongson/mc146818rtc.h
deleted file mode 100644
index ed7fe9783..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/mc146818rtc.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1998, 2001, 03, 07 by Ralf Baechle (ralf@linux-mips.org)
- *
- * RTC routines for PC style attached Dallas chip.
- */
-#ifndef __ASM_MACH_LOONGSON_MC146818RTC_H
-#define __ASM_MACH_LOONGSON_MC146818RTC_H
-
-#include <linux/io.h>
-
-#define RTC_PORT(x)	(0x70 + (x))
-#define RTC_IRQ		8
-
-static inline unsigned char CMOS_READ(unsigned long addr)
-{
-	outb_p(addr, RTC_PORT(0));
-	return inb_p(RTC_PORT(1));
-}
-
-static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
-{
-	outb_p(addr, RTC_PORT(0));
-	outb_p(data, RTC_PORT(1));
-}
-
-#define RTC_ALWAYS_BCD	0
-
-#ifndef mc146818_decode_year
-#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970)
-#endif
-
-#endif /* __ASM_MACH_LOONGSON_MC146818RTC_H */
diff --git a/kernel/arch/mips/include/asm/mach-loongson/mem.h b/kernel/arch/mips/include/asm/mach-loongson/mem.h
deleted file mode 100644
index f4a36d7db..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/mem.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Copyright (C) 2009 Lemote, Inc.
- * Author: Wu Zhangjin <wuzhangjin@gmail.com>
- *
- * This program is free software; you can redistribute	it and/or modify it
- * under  the terms of	the GNU General	 Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#ifndef __ASM_MACH_LOONGSON_MEM_H
-#define __ASM_MACH_LOONGSON_MEM_H
-
-/*
- * high memory space
- *
- * in loongson2e, starts from 512M
- * in loongson2f, starts from 2G 256M
- */
-#ifdef CONFIG_CPU_LOONGSON2E
-#define LOONGSON_HIGHMEM_START	0x20000000
-#else
-#define LOONGSON_HIGHMEM_START	0x90000000
-#endif
-
-/*
- * the peripheral registers(MMIO):
- *
- * On the Lemote Loongson 2e system, reside between 0x1000:0000 and 0x2000:0000.
- * On the Lemote Loongson 2f system, reside between 0x1000:0000 and 0x8000:0000.
- */
-
-#define LOONGSON_MMIO_MEM_START 0x10000000
-
-#ifdef CONFIG_CPU_LOONGSON2E
-#define LOONGSON_MMIO_MEM_END	0x20000000
-#else
-#define LOONGSON_MMIO_MEM_END	0x80000000
-#endif
-
-#endif /* __ASM_MACH_LOONGSON_MEM_H */
diff --git a/kernel/arch/mips/include/asm/mach-loongson/mmzone.h b/kernel/arch/mips/include/asm/mach-loongson/mmzone.h
deleted file mode 100644
index 37c08a27b..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/mmzone.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Copyright (C) 2010 Loongson Inc. & Lemote Inc. &
- *                    Insititute of Computing Technology
- * Author:  Xiang Gao, gaoxiang@ict.ac.cn
- *          Huacai Chen, chenhc@lemote.com
- *          Xiaofu Meng, Shuangshuang Zhang
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-#ifndef _ASM_MACH_MMZONE_H
-#define _ASM_MACH_MMZONE_H
-
-#include <boot_param.h>
-#define NODE_ADDRSPACE_SHIFT 44
-#define NODE0_ADDRSPACE_OFFSET 0x000000000000UL
-#define NODE1_ADDRSPACE_OFFSET 0x100000000000UL
-#define NODE2_ADDRSPACE_OFFSET 0x200000000000UL
-#define NODE3_ADDRSPACE_OFFSET 0x300000000000UL
-
-#define pa_to_nid(addr)  (((addr) & 0xf00000000000) >> NODE_ADDRSPACE_SHIFT)
-
-#define LEVELS_PER_SLICE 128
-
-struct slice_data {
-	unsigned long irq_enable_mask[2];
-	int level_to_irq[LEVELS_PER_SLICE];
-};
-
-struct hub_data {
-	cpumask_t	h_cpus;
-	unsigned long slice_map;
-	unsigned long irq_alloc_mask[2];
-	struct slice_data slice[2];
-};
-
-struct node_data {
-	struct pglist_data pglist;
-	struct hub_data hub;
-	cpumask_t cpumask;
-};
-
-extern struct node_data *__node_data[];
-
-#define NODE_DATA(n)		(&__node_data[(n)]->pglist)
-#define hub_data(n)		(&__node_data[(n)]->hub)
-
-extern void setup_zero_pages(void);
-extern void __init prom_init_numa_memory(void);
-
-#endif /* _ASM_MACH_MMZONE_H */
diff --git a/kernel/arch/mips/include/asm/mach-loongson/pci.h b/kernel/arch/mips/include/asm/mach-loongson/pci.h
deleted file mode 100644
index 1212774f6..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/pci.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * Copyright (c) 2008 Zhang Le <r0bertz@gentoo.org>
- * Copyright (c) 2009 Wu Zhangjin <wuzhangjin@gmail.com>
- *
- * This program is free software; you can redistribute it
- * and/or modify it under the terms of the GNU General
- * Public License as published by the Free Software
- * Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifndef __ASM_MACH_LOONGSON_PCI_H_
-#define __ASM_MACH_LOONGSON_PCI_H_
-
-extern struct pci_ops loongson_pci_ops;
-
-/* this is an offset from mips_io_port_base */
-#define LOONGSON_PCI_IO_START	0x00004000UL
-
-#ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG
-
-/*
- * we use address window2 to map cpu address space to pci space
- * window2: cpu [1G, 2G] -> pci [1G, 2G]
- * why not use window 0 & 1? because they are used by cpu when booting.
- * window0: cpu [0, 256M] -> ddr [0, 256M]
- * window1: cpu [256M, 512M] -> pci [256M, 512M]
- */
-
-/* the smallest LOONGSON_CPU_MEM_SRC can be 512M */
-#define LOONGSON_CPU_MEM_SRC	0x40000000ul		/* 1G */
-#define LOONGSON_PCI_MEM_DST	LOONGSON_CPU_MEM_SRC
-
-#define LOONGSON_PCI_MEM_START	LOONGSON_PCI_MEM_DST
-#define LOONGSON_PCI_MEM_END	(0x80000000ul-1)	/* 2G */
-
-#define MMAP_CPUTOPCI_SIZE	(LOONGSON_PCI_MEM_END - \
-					LOONGSON_PCI_MEM_START + 1)
-
-#else	/* loongson2f/32bit & loongson2e */
-
-/* this pci memory space is mapped by pcimap in pci.c */
-#ifdef CONFIG_CPU_LOONGSON3
-#define LOONGSON_PCI_MEM_START	0x40000000UL
-#define LOONGSON_PCI_MEM_END	0x7effffffUL
-#else
-#define LOONGSON_PCI_MEM_START	LOONGSON_PCILO1_BASE
-#define LOONGSON_PCI_MEM_END	(LOONGSON_PCILO1_BASE + 0x04000000 * 2)
-#endif
-/* this is an offset from mips_io_port_base */
-#define LOONGSON_PCI_IO_START	0x00004000UL
-
-#endif	/* !CONFIG_CPU_SUPPORTS_ADDRWINCFG */
-
-#endif /* !__ASM_MACH_LOONGSON_PCI_H_ */
diff --git a/kernel/arch/mips/include/asm/mach-loongson/spaces.h b/kernel/arch/mips/include/asm/mach-loongson/spaces.h
deleted file mode 100644
index e2506ee90..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/spaces.h
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef __ASM_MACH_LOONGSON_SPACES_H_
-#define __ASM_MACH_LOONGSON_SPACES_H_
-
-#if defined(CONFIG_64BIT)
-#define CAC_BASE        _AC(0x9800000000000000, UL)
-#endif /* CONFIG_64BIT */
-
-#include <asm/mach-generic/spaces.h>
-#endif
diff --git a/kernel/arch/mips/include/asm/mach-loongson/topology.h b/kernel/arch/mips/include/asm/mach-loongson/topology.h
deleted file mode 100644
index 0d8f3b55b..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/topology.h
+++ /dev/null
@@ -1,23 +0,0 @@
-#ifndef _ASM_MACH_TOPOLOGY_H
-#define _ASM_MACH_TOPOLOGY_H
-
-#ifdef CONFIG_NUMA
-
-#define cpu_to_node(cpu)	(cpu_logical_map(cpu) >> 2)
-#define parent_node(node)	(node)
-#define cpumask_of_node(node)	(&__node_data[(node)]->cpumask)
-
-struct pci_bus;
-extern int pcibus_to_node(struct pci_bus *);
-
-#define cpumask_of_pcibus(bus)	(cpu_online_mask)
-
-extern unsigned char __node_distances[MAX_NUMNODES][MAX_NUMNODES];
-
-#define node_distance(from, to)	(__node_distances[(from)][(to)])
-
-#endif
-
-#include <asm-generic/topology.h>
-
-#endif /* _ASM_MACH_TOPOLOGY_H */
diff --git a/kernel/arch/mips/include/asm/mach-loongson/workarounds.h b/kernel/arch/mips/include/asm/mach-loongson/workarounds.h
deleted file mode 100644
index e180c1422..000000000
--- a/kernel/arch/mips/include/asm/mach-loongson/workarounds.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __ASM_MACH_LOONGSON_WORKAROUNDS_H_
-#define __ASM_MACH_LOONGSON_WORKAROUNDS_H_
-
-#define WORKAROUND_CPUFREQ	0x00000001
-#define WORKAROUND_CPUHOTPLUG	0x00000002
-
-#endif