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authorYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 12:17:53 -0700
committerYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 15:44:42 -0700
commit9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch)
tree1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/m32r/boot
parent98260f3884f4a202f9ca5eabed40b1354c489b29 (diff)
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base. It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and the base is: commit 0917f823c59692d751951bf5ea699a2d1e2f26a2 Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Date: Sat Jul 25 12:13:34 2015 +0200 Prepare v4.1.3-rt3 Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> We lose all the git history this way and it's not good. We should apply another opnfv project repo in future. Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423 Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/m32r/boot')
-rw-r--r--kernel/arch/m32r/boot/Makefile19
-rw-r--r--kernel/arch/m32r/boot/compressed/Makefile51
-rw-r--r--kernel/arch/m32r/boot/compressed/boot.h59
-rw-r--r--kernel/arch/m32r/boot/compressed/head.S176
-rw-r--r--kernel/arch/m32r/boot/compressed/install.sh57
-rw-r--r--kernel/arch/m32r/boot/compressed/m32r_sio.c75
-rw-r--r--kernel/arch/m32r/boot/compressed/misc.c91
-rw-r--r--kernel/arch/m32r/boot/compressed/vmlinux.lds.S30
-rw-r--r--kernel/arch/m32r/boot/compressed/vmlinux.scr9
-rw-r--r--kernel/arch/m32r/boot/setup.S184
10 files changed, 751 insertions, 0 deletions
diff --git a/kernel/arch/m32r/boot/Makefile b/kernel/arch/m32r/boot/Makefile
new file mode 100644
index 000000000..af2cef475
--- /dev/null
+++ b/kernel/arch/m32r/boot/Makefile
@@ -0,0 +1,19 @@
+#
+# arch/m32r/boot/Makefile
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License. See the file "COPYING" in the main directory of this archive
+# for more details.
+
+targets := zImage
+subdir- := compressed
+
+obj-y := setup.o
+
+$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
+ $(call if_changed,objcopy)
+ @echo 'Kernel: $@ is ready'
+
+$(obj)/compressed/vmlinux: FORCE
+ $(Q)$(MAKE) $(build)=$(obj)/compressed $@
+
diff --git a/kernel/arch/m32r/boot/compressed/Makefile b/kernel/arch/m32r/boot/compressed/Makefile
new file mode 100644
index 000000000..01729c297
--- /dev/null
+++ b/kernel/arch/m32r/boot/compressed/Makefile
@@ -0,0 +1,51 @@
+#
+# linux/arch/m32r/boot/compressed/Makefile
+#
+# create a compressed vmlinux image from the original vmlinux
+#
+
+targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 \
+ vmlinux.bin.lzma head.o misc.o piggy.o vmlinux.lds
+
+OBJECTS = $(obj)/head.o $(obj)/misc.o
+
+#
+# IMAGE_OFFSET is the load offset of the compression loader
+#
+#IMAGE_OFFSET := $(shell printf "0x%08x" $$[$(CONFIG_MEMORY_START)+0x2000])
+#IMAGE_OFFSET := $(shell printf "0x%08x" $$[$(CONFIG_MEMORY_START)+0x00400000])
+
+LDFLAGS_vmlinux := -T
+
+$(obj)/vmlinux: $(obj)/vmlinux.lds $(OBJECTS) $(obj)/piggy.o FORCE
+ $(call if_changed,ld)
+ @:
+
+$(obj)/vmlinux.bin: vmlinux FORCE
+ $(call if_changed,objcopy)
+
+$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
+ $(call if_changed,gzip)
+
+$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
+ $(call if_changed,bzip2)
+
+$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
+ $(call if_changed,lzma)
+
+CFLAGS_misc.o += -fpic
+
+ifdef CONFIG_MMU
+LDFLAGS_piggy.o := -r --format binary --oformat elf32-m32r-linux -T
+else
+LDFLAGS_piggy.o := -r --format binary --oformat elf32-m32r -T
+endif
+
+OBJCOPYFLAGS += -R .empty_zero_page
+
+suffix-$(CONFIG_KERNEL_GZIP) = gz
+suffix-$(CONFIG_KERNEL_BZIP2) = bz2
+suffix-$(CONFIG_KERNEL_LZMA) = lzma
+
+$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y) FORCE
+ $(call if_changed,ld)
diff --git a/kernel/arch/m32r/boot/compressed/boot.h b/kernel/arch/m32r/boot/compressed/boot.h
new file mode 100644
index 000000000..9272e38d1
--- /dev/null
+++ b/kernel/arch/m32r/boot/compressed/boot.h
@@ -0,0 +1,59 @@
+/*
+ * 1. load vmlinuz
+ *
+ * CONFIG_MEMORY_START +-----------------------+
+ * | vmlinuz |
+ * +-----------------------+
+ * 2. decompressed
+ *
+ * CONFIG_MEMORY_START +-----------------------+
+ * | vmlinuz |
+ * +-----------------------+
+ * | |
+ * BOOT_RELOC_ADDR +-----------------------+
+ * | |
+ * KERNEL_DECOMPRESS_ADDR +-----------------------+
+ * | vmlinux |
+ * +-----------------------+
+ *
+ * 3. relocate copy & jump code
+ *
+ * CONFIG_MEMORY_START +-----------------------+
+ * | vmlinuz |
+ * +-----------------------+
+ * | |
+ * BOOT_RELOC_ADDR +-----------------------+
+ * | boot(copy&jump) |
+ * KERNEL_DECOMPRESS_ADDR +-----------------------+
+ * | vmlinux |
+ * +-----------------------+
+ *
+ * 4. relocate decompressed kernel
+ *
+ * CONFIG_MEMORY_START +-----------------------+
+ * | vmlinux |
+ * +-----------------------+
+ * | |
+ * BOOT_RELOC_ADDR +-----------------------+
+ * | boot(copy&jump) |
+ * KERNEL_DECOMPRESS_ADDR +-----------------------+
+ * | |
+ * +-----------------------+
+ *
+ */
+#ifdef __ASSEMBLY__
+#define __val(x) x
+#else
+#define __val(x) (x)
+#endif
+
+#define DECOMPRESS_OFFSET_BASE __val(0x00900000)
+#define BOOT_RELOC_SIZE __val(0x00001000)
+
+#define KERNEL_EXEC_ADDR __val(CONFIG_MEMORY_START)
+#define KERNEL_DECOMPRESS_ADDR __val(CONFIG_MEMORY_START + \
+ DECOMPRESS_OFFSET_BASE + BOOT_RELOC_SIZE)
+#define KERNEL_ENTRY __val(CONFIG_MEMORY_START + 0x1000)
+
+#define BOOT_EXEC_ADDR __val(CONFIG_MEMORY_START)
+#define BOOT_RELOC_ADDR __val(CONFIG_MEMORY_START + DECOMPRESS_OFFSET_BASE)
diff --git a/kernel/arch/m32r/boot/compressed/head.S b/kernel/arch/m32r/boot/compressed/head.S
new file mode 100644
index 000000000..95a0563ff
--- /dev/null
+++ b/kernel/arch/m32r/boot/compressed/head.S
@@ -0,0 +1,176 @@
+/*
+ * linux/arch/m32r/boot/compressed/head.S
+ *
+ * Copyright (c) 2001-2003 Hiroyuki Kondo, Hirokazu Takata,
+ * Hitoshi Yamamoto, Takeo Takahashi
+ * Copyright (c) 2004 Hirokazu Takata
+ */
+
+ .text
+#include <linux/linkage.h>
+#include <asm/addrspace.h>
+#include <asm/page.h>
+#include <asm/assembler.h>
+
+ /*
+ * This code can be loaded anywhere, as long as output will not
+ * overlap it.
+ *
+ * NOTE: This head.S should *NOT* be compiled with -fpic.
+ *
+ */
+
+ .global startup
+ .global __bss_start, _ebss, end, zimage_data, zimage_len
+ __ALIGN
+startup:
+ ldi r0, #0x0000 /* SPI, disable EI */
+ mvtc r0, psw
+
+ ldi r12, #-8
+ bl 1f
+ .fillinsn
+1:
+ seth r1, #high(CONFIG_MEMORY_START + 0x00400000) /* Start address */
+ add r12, r14 /* Real address */
+ sub r12, r1 /* difference */
+
+ .global got_len
+ seth r3, #high(_GLOBAL_OFFSET_TABLE_+8)
+ or3 r3, r3, #low(_GLOBAL_OFFSET_TABLE_+12)
+ add r3, r14
+
+ /* Update the contents of global offset table */
+ ldi r1, #low(got_len)
+ srli r1, #2
+ beqz r1, 2f
+ .fillinsn
+1:
+ ld r2, @r3
+ add r2, r12
+ st r2, @r3
+ addi r3, #4
+ addi r1, #-1
+ bnez r1, 1b
+ .fillinsn
+2:
+ /* XXX: resolve plt */
+
+/*
+ * Clear BSS first so that there are no surprises...
+ */
+#ifdef CONFIG_ISA_DUAL_ISSUE
+ seth r2, #high(__bss_start)
+ or3 r2, r2, #low(__bss_start)
+ add r2, r12
+ seth r3, #high(_ebss)
+ or3 r3, r3, #low(_ebss)
+ add r3, r12
+ sub r3, r2
+
+ ; R4 = BSS size in longwords (rounded down)
+ mv r4, r3 || ldi r1, #0
+ srli r4, #4 || addi r2, #-4
+ beqz r4, .Lendloop1
+.Lloop1:
+#ifndef CONFIG_CHIP_M32310
+ ; Touch memory for the no-write-allocating cache.
+ ld r0, @(4,r2)
+#endif
+ st r1, @+r2 || addi r4, #-1
+ st r1, @+r2
+ st r1, @+r2
+ st r1, @+r2 || cmpeq r1, r4 ; R4 = 0?
+ bnc .Lloop1
+.Lendloop1:
+ and3 r4, r3, #15
+ addi r2, #4
+ beqz r4, .Lendloop2
+.Lloop2:
+ stb r1, @r2 || addi r4, #-1
+ addi r2, #1
+ bnez r4, .Lloop2
+.Lendloop2:
+
+#else /* not CONFIG_ISA_DUAL_ISSUE */
+ seth r2, #high(__bss_start)
+ or3 r2, r2, #low(__bss_start)
+ add r2, r12
+ seth r3, #high(_ebss)
+ or3 r3, r3, #low(_ebss)
+ add r3, r12
+ sub r3, r2
+ mv r4, r3
+ srli r4, #2 ; R4 = BSS size in longwords (rounded down)
+ ldi r1, #0 ; clear R1 for longwords store
+ addi r2, #-4 ; account for pre-inc store
+ beqz r4, .Lendloop1 ; any more to go?
+.Lloop1:
+ st r1, @+r2 ; yep, zero out another longword
+ addi r4, #-1 ; decrement count
+ bnez r4, .Lloop1 ; go do some more
+.Lendloop1:
+
+#endif /* not CONFIG_ISA_DUAL_ISSUE */
+
+ seth r1, #high(end)
+ or3 r1, r1, #low(end)
+ add r1, r12
+ mv sp, r1
+
+/*
+ * decompress the kernel
+ */
+ mv r0, sp
+ srli r0, 31 /* MMU is ON or OFF */
+ seth r1, #high(zimage_data)
+ or3 r1, r1, #low(zimage_data)
+ add r1, r12
+ seth r2, #high(zimage_len)
+ or3 r2, r2, #low(zimage_len)
+ mv r3, sp
+
+ bl decompress_kernel
+
+#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_VDEC2)
+ /* Cache flush */
+ ldi r0, -1
+ ldi r1, 0xd0 ; invalidate i-cache, copy back d-cache
+ stb r1, @r0
+#elif defined(CONFIG_CHIP_M32102)
+ /* Cache flush */
+ ldi r0, -2
+ ldi r1, 0x0100 ; invalidate
+ stb r1, @r0
+#elif defined(CONFIG_CHIP_M32104)
+ /* Cache flush */
+ ldi r0, -2
+ ldi r1, 0x0700 ; invalidate i-cache, copy back d-cache
+ sth r1, @r0
+#else
+#error "put your cache flush function, please"
+#endif
+
+ mv r0, sp
+ srli r0, 31 /* MMU is ON or OFF */
+ slli r0, 31
+ or3 r0, r0, #0x2000
+ seth r1, #high(CONFIG_MEMORY_START)
+ or r0, r1
+ jmp r0
+
+ .balign 512
+fake_headers_as_bzImage:
+ .short 0
+ .ascii "HdrS"
+ .short 0x0202
+ .short 0
+ .short 0
+ .byte 0x00, 0x10
+ .short 0
+ .byte 0
+ .byte 1
+ .byte 0x00, 0x80
+ .long 0
+ .long 0
+
diff --git a/kernel/arch/m32r/boot/compressed/install.sh b/kernel/arch/m32r/boot/compressed/install.sh
new file mode 100644
index 000000000..16e5a0a13
--- /dev/null
+++ b/kernel/arch/m32r/boot/compressed/install.sh
@@ -0,0 +1,57 @@
+#!/bin/sh
+#
+# arch/sh/boot/install.sh
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License. See the file "COPYING" in the main directory of this archive
+# for more details.
+#
+# Copyright (C) 1995 by Linus Torvalds
+#
+# Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin
+# Adapted from code in arch/i386/boot/install.sh by Russell King
+# Adapted from code in arch/arm/boot/install.sh by Stuart Menefy
+# Adapted from code in arch/sh/boot/install.sh by Takeo Takahashi
+#
+# "make install" script for sh architecture
+#
+# Arguments:
+# $1 - kernel version
+# $2 - kernel image file
+# $3 - kernel map file
+# $4 - default install path (blank if root directory)
+#
+
+# User may have a custom install script
+
+if [ -x /sbin/${INSTALLKERNEL} ]; then
+ exec /sbin/${INSTALLKERNEL} "$@"
+fi
+
+if [ "$2" = "zImage" ]; then
+# Compressed install
+ echo "Installing compressed kernel"
+ if [ -f $4/vmlinuz-$1 ]; then
+ mv $4/vmlinuz-$1 $4/vmlinuz.old
+ fi
+
+ if [ -f $4/System.map-$1 ]; then
+ mv $4/System.map-$1 $4/System.old
+ fi
+
+ cat $2 > $4/vmlinuz-$1
+ cp $3 $4/System.map-$1
+else
+# Normal install
+ echo "Installing normal kernel"
+ if [ -f $4/vmlinux-$1 ]; then
+ mv $4/vmlinux-$1 $4/vmlinux.old
+ fi
+
+ if [ -f $4/System.map ]; then
+ mv $4/System.map $4/System.old
+ fi
+
+ cat $2 > $4/vmlinux-$1
+ cp $3 $4/System.map
+fi
diff --git a/kernel/arch/m32r/boot/compressed/m32r_sio.c b/kernel/arch/m32r/boot/compressed/m32r_sio.c
new file mode 100644
index 000000000..01d877c68
--- /dev/null
+++ b/kernel/arch/m32r/boot/compressed/m32r_sio.c
@@ -0,0 +1,75 @@
+/*
+ * arch/m32r/boot/compressed/m32r_sio.c
+ *
+ * 2003-02-12: Takeo Takahashi
+ * 2006-11-30: OPSPUT support by Kazuhiro Inaoka
+ *
+ */
+
+#include <asm/processor.h>
+
+static void putc(char c);
+
+static int puts(const char *s)
+{
+ char c;
+ while ((c = *s++)) putc(c);
+ return 0;
+}
+
+#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT)
+#include <asm/m32r.h>
+#include <asm/io.h>
+
+#define USE_FPGA_MAP 0
+
+#if USE_FPGA_MAP
+/*
+ * fpga configuration program uses MMU, and define map as same as
+ * M32104 uT-Engine board.
+ */
+#define BOOT_SIO0STS (volatile unsigned short *)(0x02c00000 + 0x20006)
+#define BOOT_SIO0TXB (volatile unsigned short *)(0x02c00000 + 0x2000c)
+#else
+#undef PLD_BASE
+#if defined(CONFIG_PLAT_OPSPUT)
+#define PLD_BASE 0x1cc00000
+#else
+#define PLD_BASE 0xa4c00000
+#endif
+#define BOOT_SIO0STS PLD_ESIO0STS
+#define BOOT_SIO0TXB PLD_ESIO0TXB
+#endif
+
+static void putc(char c)
+{
+ while ((*BOOT_SIO0STS & 0x3) != 0x3)
+ cpu_relax();
+ if (c == '\n') {
+ *BOOT_SIO0TXB = '\r';
+ while ((*BOOT_SIO0STS & 0x3) != 0x3)
+ cpu_relax();
+ }
+ *BOOT_SIO0TXB = c;
+}
+#else /* !(CONFIG_PLAT_M32700UT) */
+#if defined(CONFIG_PLAT_MAPPI2)
+#define SIO0STS (volatile unsigned short *)(0xa0efd000 + 14)
+#define SIO0TXB (volatile unsigned short *)(0xa0efd000 + 30)
+#else
+#define SIO0STS (volatile unsigned short *)(0x00efd000 + 14)
+#define SIO0TXB (volatile unsigned short *)(0x00efd000 + 30)
+#endif
+
+static void putc(char c)
+{
+ while ((*SIO0STS & 0x1) == 0)
+ cpu_relax();
+ if (c == '\n') {
+ *SIO0TXB = '\r';
+ while ((*SIO0STS & 0x1) == 0)
+ cpu_relax();
+ }
+ *SIO0TXB = c;
+}
+#endif
diff --git a/kernel/arch/m32r/boot/compressed/misc.c b/kernel/arch/m32r/boot/compressed/misc.c
new file mode 100644
index 000000000..28a09529f
--- /dev/null
+++ b/kernel/arch/m32r/boot/compressed/misc.c
@@ -0,0 +1,91 @@
+/*
+ * arch/m32r/boot/compressed/misc.c
+ *
+ * This is a collection of several routines from gzip-1.0.3
+ * adapted for Linux.
+ *
+ * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
+ *
+ * Adapted for SH by Stuart Menefy, Aug 1999
+ *
+ * 2003-02-12: Support M32R by Takeo Takahashi
+ */
+
+/*
+ * gzip declarations
+ */
+#define STATIC static
+
+#undef memset
+#undef memcpy
+#define memzero(s, n) memset ((s), 0, (n))
+
+static void error(char *m);
+
+#include "m32r_sio.c"
+
+static unsigned long free_mem_ptr;
+static unsigned long free_mem_end_ptr;
+
+#ifdef CONFIG_KERNEL_BZIP2
+void *memset(void *s, int c, size_t n)
+{
+ char *ss = s;
+
+ while (n--)
+ *ss++ = c;
+ return s;
+}
+#endif
+
+#ifdef CONFIG_KERNEL_GZIP
+void *memcpy(void *dest, const void *src, size_t n)
+{
+ char *d = dest;
+ const char *s = src;
+ while (n--)
+ *d++ = *s++;
+
+ return dest;
+}
+
+#define BOOT_HEAP_SIZE 0x10000
+#include "../../../../lib/decompress_inflate.c"
+#endif
+
+#ifdef CONFIG_KERNEL_BZIP2
+#define BOOT_HEAP_SIZE 0x400000
+#include "../../../../lib/decompress_bunzip2.c"
+#endif
+
+#ifdef CONFIG_KERNEL_LZMA
+#define BOOT_HEAP_SIZE 0x10000
+#include "../../../../lib/decompress_unlzma.c"
+#endif
+
+static void error(char *x)
+{
+ puts("\n\n");
+ puts(x);
+ puts("\n\n -- System halted");
+
+ while(1); /* Halt */
+}
+
+void
+decompress_kernel(int mmu_on, unsigned char *zimage_data,
+ unsigned int zimage_len, unsigned long heap)
+{
+ unsigned char *input_data = zimage_data;
+ int input_len = zimage_len;
+ unsigned char *output_data;
+
+ output_data = (unsigned char *)CONFIG_MEMORY_START + 0x2000
+ + (mmu_on ? 0x80000000 : 0);
+ free_mem_ptr = heap;
+ free_mem_end_ptr = free_mem_ptr + BOOT_HEAP_SIZE;
+
+ puts("\nDecompressing Linux... ");
+ decompress(input_data, input_len, NULL, NULL, output_data, NULL, error);
+ puts("done.\nBooting the kernel.\n");
+}
diff --git a/kernel/arch/m32r/boot/compressed/vmlinux.lds.S b/kernel/arch/m32r/boot/compressed/vmlinux.lds.S
new file mode 100644
index 000000000..dd11963f6
--- /dev/null
+++ b/kernel/arch/m32r/boot/compressed/vmlinux.lds.S
@@ -0,0 +1,30 @@
+
+OUTPUT_ARCH(m32r)
+ENTRY(startup)
+SECTIONS
+{
+ . = CONFIG_MEMORY_START + 0x00400000;
+
+ _text = .;
+ .text : { *(.text) } = 0
+ .rodata : { *(.rodata) *(.rodata.*) }
+ _etext = .;
+
+ . = ALIGN(32 / 8);
+ .data : { *(.data) }
+ . = ALIGN(32 / 8);
+ _got = .;
+ .got : { *(.got) _egot = .; *(.got.*) }
+ _edata = .;
+
+ . = ALIGN(32 / 8);
+ __bss_start = .;
+ .bss : { *(.bss) *(.sbss) }
+ . = ALIGN(32 / 8);
+ _ebss = .;
+ . = ALIGN(4096);
+ . += 4096;
+ end = . ;
+
+ got_len = (_egot - _got);
+}
diff --git a/kernel/arch/m32r/boot/compressed/vmlinux.scr b/kernel/arch/m32r/boot/compressed/vmlinux.scr
new file mode 100644
index 000000000..924c7992c
--- /dev/null
+++ b/kernel/arch/m32r/boot/compressed/vmlinux.scr
@@ -0,0 +1,9 @@
+SECTIONS
+{
+ .data : {
+ zimage_data = .;
+ *(.data)
+ zimage_data_end = .;
+ }
+ zimage_len = zimage_data_end - zimage_data;
+}
diff --git a/kernel/arch/m32r/boot/setup.S b/kernel/arch/m32r/boot/setup.S
new file mode 100644
index 000000000..ef843d630
--- /dev/null
+++ b/kernel/arch/m32r/boot/setup.S
@@ -0,0 +1,184 @@
+/*
+ * linux/arch/m32r/boot/setup.S -- A setup code.
+ *
+ * Copyright (C) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
+ * Hitoshi Yamamoto, Hayato Fujiwara
+ *
+ */
+
+#include <linux/linkage.h>
+#include <asm/segment.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+
+#include <asm/assembler.h>
+#include <asm/mmu_context.h>
+#include <asm/m32r.h>
+
+/*
+ * References to members of the boot_cpu_data structure.
+ */
+
+#define CPU_PARAMS boot_cpu_data
+#define M32R_MCICAR 0xfffffff0
+#define M32R_MCDCAR 0xfffffff4
+#define M32R_MCCR 0xfffffffc
+#define M32R_BSCR0 0xffffffd2
+
+;BSEL
+#define BSEL0CR0 0x00ef5000
+#define BSEL0CR1 0x00ef5004
+#define BSEL1CR0 0x00ef5100
+#define BSEL1CR1 0x00ef5104
+#define BSEL0CR0_VAL 0x00000000
+#define BSEL0CR1_VAL 0x01200100
+#define BSEL1CR0_VAL 0x01018000
+#define BSEL1CR1_VAL 0x00200001
+
+;SDRAMC
+#define SDRAMC_SDRF0 0x00ef6000
+#define SDRAMC_SDRF1 0x00ef6004
+#define SDRAMC_SDIR0 0x00ef6008
+#define SDRAMC_SDIR1 0x00ef600c
+#define SDRAMC_SD0ADR 0x00ef6020
+#define SDRAMC_SD0ER 0x00ef6024
+#define SDRAMC_SD0TR 0x00ef6028
+#define SDRAMC_SD0MOD 0x00ef602c
+#define SDRAMC_SD1ADR 0x00ef6040
+#define SDRAMC_SD1ER 0x00ef6044
+#define SDRAMC_SD1TR 0x00ef6048
+#define SDRAMC_SD1MOD 0x00ef604c
+#define SDRAM0 0x18000000
+#define SDRAM1 0x1c000000
+
+/*------------------------------------------------------------------------
+ * start up
+ */
+
+/*------------------------------------------------------------------------
+ * Kernel entry
+ */
+ .section .boot, "ax"
+ENTRY(boot)
+
+/* Set cache mode */
+#if defined(CONFIG_CHIP_XNUX2)
+ ldi r0, #-2 ;LDIMM (r0, M32R_MCCR)
+ ldi r1, #0x0101 ; cache on (with invalidation)
+; ldi r1, #0x00 ; cache off
+ sth r1, @r0
+#elif defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_VDEC2) \
+ || defined(CONFIG_CHIP_OPSP)
+ ldi r0, #-4 ;LDIMM (r0, M32R_MCCR)
+ ldi r1, #0x73 ; cache on (with invalidation)
+; ldi r1, #0x00 ; cache off
+ st r1, @r0
+#elif defined(CONFIG_CHIP_M32102)
+ ldi r0, #-4 ;LDIMM (r0, M32R_MCCR)
+ ldi r1, #0x101 ; cache on (with invalidation)
+; ldi r1, #0x00 ; cache off
+ st r1, @r0
+#elif defined(CONFIG_CHIP_M32104)
+ ldi r0, #-96 ; DNCR0
+ seth r1, #0x0060 ; from 0x00600000
+ or3 r1, r1, #0x0005 ; size 2MB
+ st r1, @r0
+ seth r1, #0x0100 ; from 0x01000000
+ or3 r1, r1, #0x0003 ; size 16MB
+ st r1, @+r0
+ seth r1, #0x0200 ; from 0x02000000
+ or3 r1, r1, #0x0002 ; size 32MB
+ st r1, @+r0
+ ldi r0, #-4 ;LDIMM (r0, M32R_MCCR)
+ ldi r1, #0x703 ; cache on (with invalidation)
+ st r1, @r0
+#else
+#error unknown chip configuration
+#endif
+
+#ifdef CONFIG_SMP
+ ;; if not BSP (CPU#0) goto AP_loop
+ seth r5, #shigh(M32R_CPUID_PORTL)
+ ld r5, @(low(M32R_CPUID_PORTL), r5)
+ bnez r5, AP_loop
+#if !defined(CONFIG_PLAT_USRV)
+ ;; boot AP
+ ld24 r5, #0xeff2f8 ; IPICR7
+ ldi r6, #0x2 ; IPI to CPU1
+ st r6, @r5
+#endif
+#endif
+
+/*
+ * Now, Jump to stext
+ * if with MMU, TLB on.
+ * if with no MMU, only jump.
+ */
+ .global eit_vector
+mmu_on:
+ LDIMM (r13, stext)
+#ifdef CONFIG_MMU
+ bl init_tlb
+ LDIMM (r2, eit_vector) ; set EVB(cr5)
+ mvtc r2, cr5
+ seth r0, #high(MMU_REG_BASE) ; Set MMU_REG_BASE higher
+ or3 r0, r0, #low(MMU_REG_BASE) ; Set MMU_REG_BASE lower
+ ldi r1, #0x01
+ st r1, @(MATM_offset,r0) ; Set MATM (T bit ON)
+ ld r0, @(MATM_offset,r0) ; Check
+#else
+#if defined(CONFIG_CHIP_M32700)
+ seth r0,#high(M32R_MCDCAR)
+ or3 r0,r0,#low(M32R_MCDCAR)
+ ld24 r1,#0x8080
+ st r1,@r0
+#elif defined(CONFIG_CHIP_M32104)
+ LDIMM (r2, eit_vector) ; set EVB(cr5)
+ mvtc r2, cr5
+#endif
+#endif /* CONFIG_MMU */
+ jmp r13
+ nop
+ nop
+
+#ifdef CONFIG_SMP
+/*
+ * AP wait loop
+ */
+ENTRY(AP_loop)
+ ;; disable interrupt
+ clrpsw #0x40
+ ;; reset EVB
+ LDIMM (r4, _AP_RE)
+ seth r5, #high(__PAGE_OFFSET)
+ or3 r5, r5, #low(__PAGE_OFFSET)
+ not r5, r5
+ and r4, r5
+ mvtc r4, cr5
+ ;; disable maskable interrupt
+ seth r4, #high(M32R_ICU_IMASK_PORTL)
+ or3 r4, r4, #low(M32R_ICU_IMASK_PORTL)
+ ldi r5, #0
+ st r5, @r4
+ ld r5, @r4
+ ;; enable only IPI
+ setpsw #0x40
+ ;; LOOOOOOOOOOOOOOP!!!
+ .fillinsn
+2:
+ nop
+ nop
+ bra 2b
+ nop
+ nop
+
+#ifdef CONFIG_CHIP_M32700_TS1
+ .global dcache_dummy
+ .balign 16, 0
+dcache_dummy:
+ .byte 16
+#endif /* CONFIG_CHIP_M32700_TS1 */
+#endif /* CONFIG_SMP */
+
+ .end
+