diff options
author | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 12:17:53 -0700 |
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committer | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 15:44:42 -0700 |
commit | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch) | |
tree | 1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/blackfin/include/asm/smp.h | |
parent | 98260f3884f4a202f9ca5eabed40b1354c489b29 (diff) |
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base.
It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and
the base is:
commit 0917f823c59692d751951bf5ea699a2d1e2f26a2
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Sat Jul 25 12:13:34 2015 +0200
Prepare v4.1.3-rt3
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
We lose all the git history this way and it's not good. We
should apply another opnfv project repo in future.
Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/blackfin/include/asm/smp.h')
-rw-r--r-- | kernel/arch/blackfin/include/asm/smp.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/kernel/arch/blackfin/include/asm/smp.h b/kernel/arch/blackfin/include/asm/smp.h new file mode 100644 index 000000000..9631598dc --- /dev/null +++ b/kernel/arch/blackfin/include/asm/smp.h @@ -0,0 +1,54 @@ +/* + * Copyright 2007-2009 Analog Devices Inc. + * Philippe Gerum <rpm@xenomai.org> + * + * Licensed under the GPL-2 or later. + */ + +#ifndef __ASM_BLACKFIN_SMP_H +#define __ASM_BLACKFIN_SMP_H + +#include <linux/kernel.h> +#include <linux/threads.h> +#include <linux/cpumask.h> +#include <linux/cache.h> +#include <asm/blackfin.h> +#include <mach/smp.h> + +#define raw_smp_processor_id() blackfin_core_id() + +extern void bfin_relocate_coreb_l1_mem(void); +extern void arch_send_call_function_single_ipi(int cpu); +extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); + +#if defined(CONFIG_SMP) && defined(CONFIG_ICACHE_FLUSH_L1) +asmlinkage void blackfin_icache_flush_range_l1(unsigned long *ptr); +extern unsigned long blackfin_iflush_l1_entry[NR_CPUS]; +#endif + +struct corelock_slot { + int lock; +}; +extern struct corelock_slot corelock; + +#ifdef __ARCH_SYNC_CORE_ICACHE +extern unsigned long icache_invld_count[NR_CPUS]; +#endif +#ifdef __ARCH_SYNC_CORE_DCACHE +extern unsigned long dcache_invld_count[NR_CPUS]; +#endif + +void smp_icache_flush_range_others(unsigned long start, + unsigned long end); +#ifdef CONFIG_HOTPLUG_CPU +void coreb_die(void); +void cpu_die(void); +void platform_cpu_die(void); +int __cpu_disable(void); +int __cpu_die(unsigned int cpu); +#endif + +void smp_timer_broadcast(const struct cpumask *mask); + + +#endif /* !__ASM_BLACKFIN_SMP_H */ |