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authorDon Dugger <donald.d.dugger@intel.com>2015-10-29 22:15:25 +0000
committerGerrit Code Review <gerrit@172.30.200.206>2015-10-29 22:15:25 +0000
commitafc76d554ed517e38d46b6b182a7016406a1323f (patch)
tree06133cb33a43488837ea67667458e1582f2f40ce /kernel/arch/arm64/include/asm/memory.h
parent41f827bfbb10e03c4d228fbcc801dd51fb9983b0 (diff)
parentec0a2ed6d8a5e555edef907895c041e285fdb495 (diff)
Merge "These changes are a raw update to a vanilla kernel 4.1.10, with the recently announced rt patch patch-4.1.10-rt10.patch. No further changes needed."
Diffstat (limited to 'kernel/arch/arm64/include/asm/memory.h')
-rw-r--r--kernel/arch/arm64/include/asm/memory.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/kernel/arch/arm64/include/asm/memory.h b/kernel/arch/arm64/include/asm/memory.h
index f800d45ea..44a59c20e 100644
--- a/kernel/arch/arm64/include/asm/memory.h
+++ b/kernel/arch/arm64/include/asm/memory.h
@@ -114,6 +114,14 @@ extern phys_addr_t memstart_addr;
#define PHYS_OFFSET ({ memstart_addr; })
/*
+ * The maximum physical address that the linear direct mapping
+ * of system RAM can cover. (PAGE_OFFSET can be interpreted as
+ * a 2's complement signed quantity and negated to derive the
+ * maximum size of the linear mapping.)
+ */
+#define MAX_MEMBLOCK_ADDR ({ memstart_addr - PAGE_OFFSET - 1; })
+
+/*
* PFNs are used to describe any physical page; this means
* PFN 0 == physical address 0.
*