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authorJosé Pekkarinen <jose.pekkarinen@nokia.com>2016-04-11 10:41:07 +0300
committerJosé Pekkarinen <jose.pekkarinen@nokia.com>2016-04-13 08:17:18 +0300
commite09b41010ba33a20a87472ee821fa407a5b8da36 (patch)
treed10dc367189862e7ca5c592f033dc3726e1df4e3 /kernel/arch/arm/mach-zynq
parentf93b97fd65072de626c074dbe099a1fff05ce060 (diff)
These changes are the raw update to linux-4.4.6-rt14. Kernel sources
are taken from kernel.org, and rt patch from the rt wiki download page. During the rebasing, the following patch collided: Force tick interrupt and get rid of softirq magic(I70131fb85). Collisions have been removed because its logic was found on the source already. Change-Id: I7f57a4081d9deaa0d9ccfc41a6c8daccdee3b769 Signed-off-by: José Pekkarinen <jose.pekkarinen@nokia.com>
Diffstat (limited to 'kernel/arch/arm/mach-zynq')
-rw-r--r--kernel/arch/arm/mach-zynq/common.c13
-rw-r--r--kernel/arch/arm/mach-zynq/common.h1
-rw-r--r--kernel/arch/arm/mach-zynq/headsmp.S2
-rw-r--r--kernel/arch/arm/mach-zynq/slcr.c28
4 files changed, 23 insertions, 21 deletions
diff --git a/kernel/arch/arm/mach-zynq/common.c b/kernel/arch/arm/mach-zynq/common.c
index 58ef2a700..6f39d03cc 100644
--- a/kernel/arch/arm/mach-zynq/common.c
+++ b/kernel/arch/arm/mach-zynq/common.c
@@ -154,7 +154,7 @@ static void __init zynq_timer_init(void)
zynq_clock_init();
of_clk_init(NULL);
- clocksource_of_init();
+ clocksource_probe();
}
static struct map_desc zynq_cortex_a9_scu_map __initdata = {
@@ -186,15 +186,9 @@ static void __init zynq_map_io(void)
static void __init zynq_irq_init(void)
{
- gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND);
irqchip_init();
}
-static void zynq_system_reset(enum reboot_mode mode, const char *cmd)
-{
- zynq_slcr_system_reset();
-}
-
static const char * const zynq_dt_match[] = {
"xlnx,zynq-7000",
NULL
@@ -202,8 +196,8 @@ static const char * const zynq_dt_match[] = {
DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
/* 64KB way size, 8-way associativity, parity disabled */
- .l2c_aux_val = 0x00000000,
- .l2c_aux_mask = 0xffffffff,
+ .l2c_aux_val = 0x00400000,
+ .l2c_aux_mask = 0xffbfffff,
.smp = smp_ops(zynq_smp_ops),
.map_io = zynq_map_io,
.init_irq = zynq_irq_init,
@@ -212,5 +206,4 @@ DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
.init_time = zynq_timer_init,
.dt_compat = zynq_dt_match,
.reserve = zynq_memory_init,
- .restart = zynq_system_reset,
MACHINE_END
diff --git a/kernel/arch/arm/mach-zynq/common.h b/kernel/arch/arm/mach-zynq/common.h
index 7038cae95..79cda2e5f 100644
--- a/kernel/arch/arm/mach-zynq/common.h
+++ b/kernel/arch/arm/mach-zynq/common.h
@@ -19,7 +19,6 @@
extern int zynq_slcr_init(void);
extern int zynq_early_slcr_init(void);
-extern void zynq_slcr_system_reset(void);
extern void zynq_slcr_cpu_stop(int cpu);
extern void zynq_slcr_cpu_start(int cpu);
extern bool zynq_slcr_cpu_state_read(int cpu);
diff --git a/kernel/arch/arm/mach-zynq/headsmp.S b/kernel/arch/arm/mach-zynq/headsmp.S
index 045c72720..f6d5de073 100644
--- a/kernel/arch/arm/mach-zynq/headsmp.S
+++ b/kernel/arch/arm/mach-zynq/headsmp.S
@@ -18,7 +18,7 @@ ARM_BE8(rev r0, r0)
.globl zynq_secondary_trampoline_jump
zynq_secondary_trampoline_jump:
/* Space for jumping address */
- .word /* cpu 1 */
+ .word 0 /* cpu 1 */
.globl zynq_secondary_trampoline_end
zynq_secondary_trampoline_end:
ENDPROC(zynq_secondary_trampoline)
diff --git a/kernel/arch/arm/mach-zynq/slcr.c b/kernel/arch/arm/mach-zynq/slcr.c
index c3c24fd8b..26320ebf3 100644
--- a/kernel/arch/arm/mach-zynq/slcr.c
+++ b/kernel/arch/arm/mach-zynq/slcr.c
@@ -15,6 +15,7 @@
*/
#include <linux/io.h>
+#include <linux/reboot.h>
#include <linux/mfd/syscon.h>
#include <linux/of_address.h>
#include <linux/regmap.h>
@@ -92,20 +93,21 @@ u32 zynq_slcr_get_device_id(void)
}
/**
- * zynq_slcr_system_reset - Reset the entire system.
+ * zynq_slcr_system_restart - Restart the entire system.
+ *
+ * @nb: Pointer to restart notifier block (unused)
+ * @action: Reboot mode (unused)
+ * @data: Restart handler private data (unused)
+ *
+ * Return: 0 always
*/
-void zynq_slcr_system_reset(void)
+static
+int zynq_slcr_system_restart(struct notifier_block *nb,
+ unsigned long action, void *data)
{
u32 reboot;
/*
- * Unlock the SLCR then reset the system.
- * Note that this seems to require raw i/o
- * functions or there's a lockup?
- */
- zynq_slcr_unlock();
-
- /*
* Clear 0x0F000000 bits of reboot status register to workaround
* the FSBL not loading the bitstream after soft-reboot
* This is a temporary solution until we know more.
@@ -113,8 +115,14 @@ void zynq_slcr_system_reset(void)
zynq_slcr_read(&reboot, SLCR_REBOOT_STATUS_OFFSET);
zynq_slcr_write(reboot & 0xF0FFFFFF, SLCR_REBOOT_STATUS_OFFSET);
zynq_slcr_write(1, SLCR_PS_RST_CTRL_OFFSET);
+ return 0;
}
+static struct notifier_block zynq_slcr_restart_nb = {
+ .notifier_call = zynq_slcr_system_restart,
+ .priority = 192,
+};
+
/**
* zynq_slcr_cpu_start - Start cpu
* @cpu: cpu number
@@ -219,6 +227,8 @@ int __init zynq_early_slcr_init(void)
/* unlock the SLCR so that registers can be changed */
zynq_slcr_unlock();
+ register_restart_handler(&zynq_slcr_restart_nb);
+
pr_info("%s mapped to %p\n", np->name, zynq_slcr_base);
of_node_put(np);