diff options
| author |   Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 12:17:53 -0700 |
|---|---|---|
| committer | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 15:44:42 -0700 |
| commit | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch) | |
| tree | 1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/arm/mach-w90x900/include/mach/regs-timer.h | |
| parent | 98260f3884f4a202f9ca5eabed40b1354c489b29 (diff) | |
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base.
It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and
the base is:
commit 0917f823c59692d751951bf5ea699a2d1e2f26a2
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Sat Jul 25 12:13:34 2015 +0200
Prepare v4.1.3-rt3
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
We lose all the git history this way and it's not good. We
should apply another opnfv project repo in future.
Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/arm/mach-w90x900/include/mach/regs-timer.h')
| -rw-r--r-- | kernel/arch/arm/mach-w90x900/include/mach/regs-timer.h | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/kernel/arch/arm/mach-w90x900/include/mach/regs-timer.h b/kernel/arch/arm/mach-w90x900/include/mach/regs-timer.h new file mode 100644 index 000000000..8f390620c --- /dev/null +++ b/kernel/arch/arm/mach-w90x900/include/mach/regs-timer.h @@ -0,0 +1,42 @@ +/* + * arch/arm/mach-w90x900/include/mach/regs-timer.h + * + * Copyright (c) 2008 Nuvoton technology corporation + * All rights reserved. + * + * Wan ZongShun <mcuos.com@gmail.com> + * + * Based on arch/arm/mach-s3c2410/include/mach/regs-timer.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#ifndef __ASM_ARCH_REGS_TIMER_H +#define __ASM_ARCH_REGS_TIMER_H + +/* Timer Registers */ + +#define TMR_BA W90X900_VA_TIMER +#define REG_TCSR0 (TMR_BA+0x00) +#define REG_TCSR1 (TMR_BA+0x04) +#define REG_TICR0 (TMR_BA+0x08) +#define REG_TICR1 (TMR_BA+0x0C) +#define REG_TDR0 (TMR_BA+0x10) +#define REG_TDR1 (TMR_BA+0x14) +#define REG_TISR (TMR_BA+0x18) +#define REG_WTCR (TMR_BA+0x1C) +#define REG_TCSR2 (TMR_BA+0x20) +#define REG_TCSR3 (TMR_BA+0x24) +#define REG_TICR2 (TMR_BA+0x28) +#define REG_TICR3 (TMR_BA+0x2C) +#define REG_TDR2 (TMR_BA+0x30) +#define REG_TDR3 (TMR_BA+0x34) +#define REG_TCSR4 (TMR_BA+0x40) +#define REG_TICR4 (TMR_BA+0x48) +#define REG_TDR4 (TMR_BA+0x50) + +#endif /* __ASM_ARCH_REGS_TIMER_H */ |