diff options
| author |   José Pekkarinen <jose.pekkarinen@nokia.com> | 2016-04-11 10:41:07 +0300 |
|---|---|---|
| committer | José Pekkarinen <jose.pekkarinen@nokia.com> | 2016-04-13 08:17:18 +0300 |
| commit | e09b41010ba33a20a87472ee821fa407a5b8da36 (patch) | |
| tree | d10dc367189862e7ca5c592f033dc3726e1df4e3 /kernel/arch/arm/mach-socfpga/core.h | |
| parent | f93b97fd65072de626c074dbe099a1fff05ce060 (diff) | |
These changes are the raw update to linux-4.4.6-rt14. Kernel sources
are taken from kernel.org, and rt patch from the rt wiki download page.
During the rebasing, the following patch collided:
Force tick interrupt and get rid of softirq magic(I70131fb85).
Collisions have been removed because its logic was found on the
source already.
Change-Id: I7f57a4081d9deaa0d9ccfc41a6c8daccdee3b769
Signed-off-by: José Pekkarinen <jose.pekkarinen@nokia.com>
Diffstat (limited to 'kernel/arch/arm/mach-socfpga/core.h')
| -rw-r--r-- | kernel/arch/arm/mach-socfpga/core.h | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/kernel/arch/arm/mach-socfpga/core.h b/kernel/arch/arm/mach-socfpga/core.h index 767c09e95..5bc6ea87c 100644 --- a/kernel/arch/arm/mach-socfpga/core.h +++ b/kernel/arch/arm/mach-socfpga/core.h @@ -1,6 +1,6 @@ /* * Copyright 2012 Pavel Machek <pavel@denx.de> - * Copyright (C) 2012 Altera Corporation + * Copyright (C) 2012-2015 Altera Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -25,21 +25,25 @@ #define SOCFPGA_RSTMGR_MODPERRST 0x14 #define SOCFPGA_RSTMGR_BRGMODRST 0x1c +#define SOCFPGA_A10_RSTMGR_CTRL 0xC +#define SOCFPGA_A10_RSTMGR_MODMPURST 0x20 + /* System Manager bits */ #define RSTMGR_CTRL_SWCOLDRSTREQ 0x1 /* Cold Reset */ #define RSTMGR_CTRL_SWWARMRSTREQ 0x2 /* Warm Reset */ #define RSTMGR_MPUMODRST_CPU1 0x2 /* CPU1 Reset */ -extern void __iomem *socfpga_scu_base_addr; - extern void socfpga_init_clocks(void); extern void socfpga_sysmgr_init(void); extern void __iomem *sys_manager_base_addr; extern void __iomem *rst_manager_base_addr; +extern void __iomem *sdr_ctl_base_addr; + +u32 socfpga_sdram_self_refresh(u32 sdr_base); +extern unsigned int socfpga_sdram_self_refresh_sz; -extern struct smp_operations socfpga_smp_ops; extern char secondary_trampoline, secondary_trampoline_end; extern unsigned long socfpga_cpu1start_addr; |