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authorYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 12:17:53 -0700
committerYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 15:44:42 -0700
commit9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch)
tree1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/arm/mach-pxa/include/mach/vpac270.h
parent98260f3884f4a202f9ca5eabed40b1354c489b29 (diff)
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base. It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and the base is: commit 0917f823c59692d751951bf5ea699a2d1e2f26a2 Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Date: Sat Jul 25 12:13:34 2015 +0200 Prepare v4.1.3-rt3 Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> We lose all the git history this way and it's not good. We should apply another opnfv project repo in future. Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423 Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/arm/mach-pxa/include/mach/vpac270.h')
-rw-r--r--kernel/arch/arm/mach-pxa/include/mach/vpac270.h42
1 files changed, 42 insertions, 0 deletions
diff --git a/kernel/arch/arm/mach-pxa/include/mach/vpac270.h b/kernel/arch/arm/mach-pxa/include/mach/vpac270.h
new file mode 100644
index 000000000..7bfa3dd0f
--- /dev/null
+++ b/kernel/arch/arm/mach-pxa/include/mach/vpac270.h
@@ -0,0 +1,42 @@
+/*
+ * GPIOs and interrupts for Voipac PXA270
+ *
+ * Copyright (C) 2010
+ * Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef _INCLUDE_VPAC270_H_
+#define _INCLUDE_VPAC270_H_
+
+#define GPIO1_VPAC270_USER_BTN 1
+
+#define GPIO15_VPAC270_LED_ORANGE 15
+
+#define GPIO81_VPAC270_BKL_ON 81
+#define GPIO83_VPAC270_NL_ON 83
+
+#define GPIO52_VPAC270_SD_READONLY 52
+#define GPIO53_VPAC270_SD_DETECT_N 53
+
+#define GPIO84_VPAC270_PCMCIA_CD 84
+#define GPIO35_VPAC270_PCMCIA_RDY 35
+#define GPIO107_VPAC270_PCMCIA_PPEN 107
+#define GPIO11_VPAC270_PCMCIA_RESET 11
+#define GPIO17_VPAC270_CF_CD 17
+#define GPIO12_VPAC270_CF_RDY 12
+#define GPIO16_VPAC270_CF_RESET 16
+
+#define GPIO41_VPAC270_UDC_DETECT 41
+
+#define GPIO114_VPAC270_ETH_IRQ 114
+
+#define GPIO36_VPAC270_IDE_IRQ 36
+
+#define GPIO113_VPAC270_TS_IRQ 113
+
+#endif