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authorYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 12:17:53 -0700
committerYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 15:44:42 -0700
commit9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch)
tree1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/arm/mach-prima2/Kconfig
parent98260f3884f4a202f9ca5eabed40b1354c489b29 (diff)
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base. It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and the base is: commit 0917f823c59692d751951bf5ea699a2d1e2f26a2 Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Date: Sat Jul 25 12:13:34 2015 +0200 Prepare v4.1.3-rt3 Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> We lose all the git history this way and it's not good. We should apply another opnfv project repo in future. Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423 Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/arm/mach-prima2/Kconfig')
-rw-r--r--kernel/arch/arm/mach-prima2/Kconfig44
1 files changed, 44 insertions, 0 deletions
diff --git a/kernel/arch/arm/mach-prima2/Kconfig b/kernel/arch/arm/mach-prima2/Kconfig
new file mode 100644
index 000000000..e03d8b5c9
--- /dev/null
+++ b/kernel/arch/arm/mach-prima2/Kconfig
@@ -0,0 +1,44 @@
+menuconfig ARCH_SIRF
+ bool "CSR SiRF" if ARCH_MULTI_V7
+ select ARCH_HAS_RESET_CONTROLLER
+ select ARCH_REQUIRE_GPIOLIB
+ select GENERIC_IRQ_CHIP
+ select NO_IOPORT_MAP
+ select PINCTRL
+ select PINCTRL_SIRF
+ help
+ Support for CSR SiRFprimaII/Marco/Polo platforms
+
+if ARCH_SIRF
+
+comment "CSR SiRF atlas6/primaII/Atlas7 Specific Features"
+
+config ARCH_ATLAS6
+ bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform"
+ default y
+ select SIRF_IRQ
+ help
+ Support for CSR SiRFSoC ARM Cortex A9 Platform
+
+config ARCH_ATLAS7
+ bool "CSR SiRFSoC ATLAS7 ARM Cortex A7 Platform"
+ default y
+ select ARM_GIC
+ select CPU_V7
+ select HAVE_ARM_SCU if SMP
+ select HAVE_SMP
+ help
+ Support for CSR SiRFSoC ARM Cortex A7 Platform
+
+config ARCH_PRIMA2
+ bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
+ default y
+ select SIRF_IRQ
+ select ZONE_DMA
+ help
+ Support for CSR SiRFSoC ARM Cortex A9 Platform
+
+config SIRF_IRQ
+ bool
+
+endif