diff options
| author |   Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 12:17:53 -0700 |
|---|---|---|
| committer | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 15:44:42 -0700 |
| commit | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch) | |
| tree | 1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/arm/mach-omap2/prm-regbits-33xx.h | |
| parent | 98260f3884f4a202f9ca5eabed40b1354c489b29 (diff) | |
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base.
It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and
the base is:
commit 0917f823c59692d751951bf5ea699a2d1e2f26a2
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Sat Jul 25 12:13:34 2015 +0200
Prepare v4.1.3-rt3
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
We lose all the git history this way and it's not good. We
should apply another opnfv project repo in future.
Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/arm/mach-omap2/prm-regbits-33xx.h')
| -rw-r--r-- | kernel/arch/arm/mach-omap2/prm-regbits-33xx.h | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/kernel/arch/arm/mach-omap2/prm-regbits-33xx.h b/kernel/arch/arm/mach-omap2/prm-regbits-33xx.h new file mode 100644 index 000000000..84feecee4 --- /dev/null +++ b/kernel/arch/arm/mach-omap2/prm-regbits-33xx.h @@ -0,0 +1,52 @@ +/* + * AM33XX PRM_XXX register bits + * + * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_33XX_H +#define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_33XX_H + +#include "prm.h" + +#define AM33XX_GFX_MEM_ONSTATE_MASK (0x3 << 17) +#define AM33XX_GFX_MEM_RETSTATE_MASK (1 << 6) +#define AM33XX_GFX_MEM_STATEST_MASK (0x3 << 4) +#define AM33XX_GLOBAL_WARM_SW_RST_MASK (1 << 1) +#define AM33XX_RST_GLOBAL_WARM_SW_MASK (1 << 0) +#define AM33XX_PRUSS_MEM_ONSTATE_MASK (0x3 << 5) +#define AM33XX_PRUSS_MEM_RETSTATE_MASK (1 << 7) +#define AM33XX_PRUSS_MEM_STATEST_MASK (0x3 << 23) +#define AM33XX_LASTPOWERSTATEENTERED_SHIFT 24 +#define AM33XX_LASTPOWERSTATEENTERED_MASK (0x3 << 24) +#define AM33XX_LOGICRETSTATE_MASK (1 << 2) +#define AM33XX_LOGICRETSTATE_3_3_MASK (1 << 3) +#define AM33XX_LOGICSTATEST_SHIFT 2 +#define AM33XX_LOGICSTATEST_MASK (1 << 2) +#define AM33XX_LOWPOWERSTATECHANGE_SHIFT 4 +#define AM33XX_LOWPOWERSTATECHANGE_MASK (1 << 4) +#define AM33XX_MPU_L1_ONSTATE_MASK (0x3 << 18) +#define AM33XX_MPU_L1_RETSTATE_MASK (1 << 22) +#define AM33XX_MPU_L1_STATEST_MASK (0x3 << 6) +#define AM33XX_MPU_L2_ONSTATE_MASK (0x3 << 20) +#define AM33XX_MPU_L2_RETSTATE_MASK (1 << 23) +#define AM33XX_MPU_L2_STATEST_MASK (0x3 << 8) +#define AM33XX_MPU_RAM_ONSTATE_MASK (0x3 << 16) +#define AM33XX_MPU_RAM_RETSTATE_MASK (1 << 24) +#define AM33XX_MPU_RAM_STATEST_MASK (0x3 << 4) +#define AM33XX_PER_MEM_ONSTATE_MASK (0x3 << 25) +#define AM33XX_PER_MEM_RETSTATE_MASK (1 << 29) +#define AM33XX_PER_MEM_STATEST_MASK (0x3 << 17) +#define AM33XX_RAM_MEM_ONSTATE_MASK (0x3 << 30) +#define AM33XX_RAM_MEM_RETSTATE_MASK (1 << 27) +#define AM33XX_RAM_MEM_STATEST_MASK (0x3 << 21) +#endif |