diff options
| author |   Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 12:17:53 -0700 |
|---|---|---|
| committer | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 15:44:42 -0700 |
| commit | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch) | |
| tree | 1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/arm/mach-ks8695/include/mach/regs-irq.h | |
| parent | 98260f3884f4a202f9ca5eabed40b1354c489b29 (diff) | |
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base.
It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and
the base is:
commit 0917f823c59692d751951bf5ea699a2d1e2f26a2
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Sat Jul 25 12:13:34 2015 +0200
Prepare v4.1.3-rt3
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
We lose all the git history this way and it's not good. We
should apply another opnfv project repo in future.
Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/arm/mach-ks8695/include/mach/regs-irq.h')
| -rw-r--r-- | kernel/arch/arm/mach-ks8695/include/mach/regs-irq.h | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/kernel/arch/arm/mach-ks8695/include/mach/regs-irq.h b/kernel/arch/arm/mach-ks8695/include/mach/regs-irq.h new file mode 100644 index 000000000..352b7e870 --- /dev/null +++ b/kernel/arch/arm/mach-ks8695/include/mach/regs-irq.h @@ -0,0 +1,41 @@ +/* + * arch/arm/mach-ks8695/include/mach/regs-irq.h + * + * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk> + * Copyright (C) 2006 Simtec Electronics + * + * KS8695 - IRQ registers and bit definitions + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef KS8695_IRQ_H +#define KS8695_IRQ_H + +#define KS8695_IRQ_OFFSET (0xF0000 + 0xE200) +#define KS8695_IRQ_VA (KS8695_IO_VA + KS8695_IRQ_OFFSET) +#define KS8695_IRQ_PA (KS8695_IO_PA + KS8695_IRQ_OFFSET) + + +/* + * Interrupt Controller registers + */ +#define KS8695_INTMC (0x00) /* Mode Control Register */ +#define KS8695_INTEN (0x04) /* Interrupt Enable Register */ +#define KS8695_INTST (0x08) /* Interrupt Status Register */ +#define KS8695_INTPW (0x0c) /* Interrupt Priority (WAN MAC) */ +#define KS8695_INTPH (0x10) /* Interrupt Priority (HPNA) [KS8695 only] */ +#define KS8695_INTPL (0x14) /* Interrupt Priority (LAN MAC) */ +#define KS8695_INTPT (0x18) /* Interrupt Priority (Timer) */ +#define KS8695_INTPU (0x1c) /* Interrupt Priority (UART) */ +#define KS8695_INTPE (0x20) /* Interrupt Priority (External Interrupt) */ +#define KS8695_INTPC (0x24) /* Interrupt Priority (Communications Channel) */ +#define KS8695_INTPBE (0x28) /* Interrupt Priority (Bus Error Response) */ +#define KS8695_INTMS (0x2c) /* Interrupt Mask Status Register */ +#define KS8695_INTHPF (0x30) /* Interrupt Pending Highest Priority (FIQ) */ +#define KS8695_INTHPI (0x34) /* Interrupt Pending Highest Priority (IRQ) */ + + +#endif |