summaryrefslogtreecommitdiffstats
path: root/kernel/arch/arm/mach-ixp4xx/coyote-pci.c
diff options
context:
space:
mode:
authorYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 12:17:53 -0700
committerYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 15:44:42 -0700
commit9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch)
tree1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/arm/mach-ixp4xx/coyote-pci.c
parent98260f3884f4a202f9ca5eabed40b1354c489b29 (diff)
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base. It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and the base is: commit 0917f823c59692d751951bf5ea699a2d1e2f26a2 Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Date: Sat Jul 25 12:13:34 2015 +0200 Prepare v4.1.3-rt3 Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> We lose all the git history this way and it's not good. We should apply another opnfv project repo in future. Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423 Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/arm/mach-ixp4xx/coyote-pci.c')
-rw-r--r--kernel/arch/arm/mach-ixp4xx/coyote-pci.c64
1 files changed, 64 insertions, 0 deletions
diff --git a/kernel/arch/arm/mach-ixp4xx/coyote-pci.c b/kernel/arch/arm/mach-ixp4xx/coyote-pci.c
new file mode 100644
index 000000000..5d14ce2ae
--- /dev/null
+++ b/kernel/arch/arm/mach-ixp4xx/coyote-pci.c
@@ -0,0 +1,64 @@
+/*
+ * arch/arm/mach-ixp4xx/coyote-pci.c
+ *
+ * PCI setup routines for ADI Engineering Coyote platform
+ *
+ * Copyright (C) 2002 Jungo Software Technologies.
+ * Copyright (C) 2003 MontaVista Softwrae, Inc.
+ *
+ * Maintainer: Deepak Saxena <dsaxena@mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <asm/mach-types.h>
+#include <mach/hardware.h>
+#include <asm/irq.h>
+#include <asm/mach/pci.h>
+
+#define SLOT0_DEVID 14
+#define SLOT1_DEVID 15
+
+/* PCI controller GPIO to IRQ pin mappings */
+#define SLOT0_INTA 6
+#define SLOT1_INTA 11
+
+void __init coyote_pci_preinit(void)
+{
+ irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT0_INTA), IRQ_TYPE_LEVEL_LOW);
+ irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT1_INTA), IRQ_TYPE_LEVEL_LOW);
+ ixp4xx_pci_preinit();
+}
+
+static int __init coyote_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ if (slot == SLOT0_DEVID)
+ return IXP4XX_GPIO_IRQ(SLOT0_INTA);
+ else if (slot == SLOT1_DEVID)
+ return IXP4XX_GPIO_IRQ(SLOT1_INTA);
+ else return -1;
+}
+
+struct hw_pci coyote_pci __initdata = {
+ .nr_controllers = 1,
+ .ops = &ixp4xx_ops,
+ .preinit = coyote_pci_preinit,
+ .setup = ixp4xx_setup,
+ .map_irq = coyote_map_irq,
+};
+
+int __init coyote_pci_init(void)
+{
+ if (machine_is_adi_coyote())
+ pci_common_init(&coyote_pci);
+ return 0;
+}
+
+subsys_initcall(coyote_pci_init);