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authorYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 12:17:53 -0700
committerYunhong Jiang <yunhong.jiang@intel.com>2015-08-04 15:44:42 -0700
commit9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch)
tree1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/arm/mach-highbank
parent98260f3884f4a202f9ca5eabed40b1354c489b29 (diff)
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base. It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and the base is: commit 0917f823c59692d751951bf5ea699a2d1e2f26a2 Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Date: Sat Jul 25 12:13:34 2015 +0200 Prepare v4.1.3-rt3 Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> We lose all the git history this way and it's not good. We should apply another opnfv project repo in future. Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423 Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/arm/mach-highbank')
-rw-r--r--kernel/arch/arm/mach-highbank/Kconfig18
-rw-r--r--kernel/arch/arm/mach-highbank/Makefile6
-rw-r--r--kernel/arch/arm/mach-highbank/core.h17
-rw-r--r--kernel/arch/arm/mach-highbank/highbank.c189
-rw-r--r--kernel/arch/arm/mach-highbank/pm.c58
-rw-r--r--kernel/arch/arm/mach-highbank/smc.S27
-rw-r--r--kernel/arch/arm/mach-highbank/sysregs.h86
-rw-r--r--kernel/arch/arm/mach-highbank/system.c33
8 files changed, 434 insertions, 0 deletions
diff --git a/kernel/arch/arm/mach-highbank/Kconfig b/kernel/arch/arm/mach-highbank/Kconfig
new file mode 100644
index 000000000..31aa866c3
--- /dev/null
+++ b/kernel/arch/arm/mach-highbank/Kconfig
@@ -0,0 +1,18 @@
+config ARCH_HIGHBANK
+ bool "Calxeda ECX-1000/2000 (Highbank/Midway)" if ARCH_MULTI_V7
+ select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
+ select ARCH_HAS_HOLES_MEMORYMODEL
+ select ARCH_SUPPORTS_BIG_ENDIAN
+ select ARM_AMBA
+ select ARM_ERRATA_764369 if SMP
+ select ARM_ERRATA_775420
+ select ARM_ERRATA_798181 if SMP
+ select ARM_GIC
+ select ARM_PSCI
+ select ARM_TIMER_SP804
+ select CACHE_L2X0
+ select HAVE_ARM_SCU
+ select HAVE_ARM_TWD if SMP
+ select MAILBOX
+ select PL320_MBOX
+ select ZONE_DMA if ARM_LPAE
diff --git a/kernel/arch/arm/mach-highbank/Makefile b/kernel/arch/arm/mach-highbank/Makefile
new file mode 100644
index 000000000..55840f414
--- /dev/null
+++ b/kernel/arch/arm/mach-highbank/Makefile
@@ -0,0 +1,6 @@
+obj-y := highbank.o system.o smc.o
+
+plus_sec := $(call as-instr,.arch_extension sec,+sec)
+AFLAGS_smc.o :=-Wa,-march=armv7-a$(plus_sec)
+
+obj-$(CONFIG_PM_SLEEP) += pm.o
diff --git a/kernel/arch/arm/mach-highbank/core.h b/kernel/arch/arm/mach-highbank/core.h
new file mode 100644
index 000000000..7ec5edcd1
--- /dev/null
+++ b/kernel/arch/arm/mach-highbank/core.h
@@ -0,0 +1,17 @@
+#ifndef __HIGHBANK_CORE_H
+#define __HIGHBANK_CORE_H
+
+#include <linux/reboot.h>
+
+extern void highbank_restart(enum reboot_mode, const char *);
+extern void __iomem *scu_base_addr;
+
+#ifdef CONFIG_PM_SLEEP
+extern void highbank_pm_init(void);
+#else
+static inline void highbank_pm_init(void) {}
+#endif
+
+extern void highbank_smc1(int fn, int arg);
+
+#endif
diff --git a/kernel/arch/arm/mach-highbank/highbank.c b/kernel/arch/arm/mach-highbank/highbank.c
new file mode 100644
index 000000000..231fba0d0
--- /dev/null
+++ b/kernel/arch/arm/mach-highbank/highbank.c
@@ -0,0 +1,189 @@
+/*
+ * Copyright 2010-2011 Calxeda, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/clocksource.h>
+#include <linux/dma-mapping.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/irqchip.h>
+#include <linux/pl320-ipc.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
+#include <linux/reboot.h>
+#include <linux/amba/bus.h>
+#include <linux/platform_device.h>
+
+#include <asm/psci.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include "core.h"
+#include "sysregs.h"
+
+void __iomem *sregs_base;
+void __iomem *scu_base_addr;
+
+static void __init highbank_scu_map_io(void)
+{
+ unsigned long base;
+
+ /* Get SCU base */
+ asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
+
+ scu_base_addr = ioremap(base, SZ_4K);
+}
+
+
+static void highbank_l2c310_write_sec(unsigned long val, unsigned reg)
+{
+ if (reg == L2X0_CTRL)
+ highbank_smc1(0x102, val);
+ else
+ WARN_ONCE(1, "Highbank L2C310: ignoring write to reg 0x%x\n",
+ reg);
+}
+
+static void __init highbank_init_irq(void)
+{
+ irqchip_init();
+
+ if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
+ highbank_scu_map_io();
+}
+
+static void highbank_power_off(void)
+{
+ highbank_set_pwr_shutdown();
+
+ while (1)
+ cpu_do_idle();
+}
+
+static int highbank_platform_notifier(struct notifier_block *nb,
+ unsigned long event, void *__dev)
+{
+ struct resource *res;
+ int reg = -1;
+ u32 val;
+ struct device *dev = __dev;
+
+ if (event != BUS_NOTIFY_ADD_DEVICE)
+ return NOTIFY_DONE;
+
+ if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci"))
+ reg = 0xc;
+ else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci"))
+ reg = 0x18;
+ else if (of_device_is_compatible(dev->of_node, "arm,pl330"))
+ reg = 0x20;
+ else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) {
+ res = platform_get_resource(to_platform_device(dev),
+ IORESOURCE_MEM, 0);
+ if (res) {
+ if (res->start == 0xfff50000)
+ reg = 0;
+ else if (res->start == 0xfff51000)
+ reg = 4;
+ }
+ }
+
+ if (reg < 0)
+ return NOTIFY_DONE;
+
+ if (of_property_read_bool(dev->of_node, "dma-coherent")) {
+ val = readl(sregs_base + reg);
+ writel(val | 0xff01, sregs_base + reg);
+ set_dma_ops(dev, &arm_coherent_dma_ops);
+ }
+
+ return NOTIFY_OK;
+}
+
+static struct notifier_block highbank_amba_nb = {
+ .notifier_call = highbank_platform_notifier,
+};
+
+static struct notifier_block highbank_platform_nb = {
+ .notifier_call = highbank_platform_notifier,
+};
+
+static struct platform_device highbank_cpuidle_device = {
+ .name = "cpuidle-calxeda",
+};
+
+static int hb_keys_notifier(struct notifier_block *nb, unsigned long event, void *data)
+{
+ u32 key = *(u32 *)data;
+
+ if (event != 0x1000)
+ return 0;
+
+ if (key == KEY_POWER)
+ orderly_poweroff(false);
+ else if (key == 0xffff)
+ ctrl_alt_del();
+
+ return 0;
+}
+static struct notifier_block hb_keys_nb = {
+ .notifier_call = hb_keys_notifier,
+};
+
+static void __init highbank_init(void)
+{
+ struct device_node *np;
+
+ /* Map system registers */
+ np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
+ sregs_base = of_iomap(np, 0);
+ WARN_ON(!sregs_base);
+
+ pm_power_off = highbank_power_off;
+ highbank_pm_init();
+
+ bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
+ bus_register_notifier(&amba_bustype, &highbank_amba_nb);
+
+ pl320_ipc_register_notifier(&hb_keys_nb);
+
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+
+ if (psci_ops.cpu_suspend)
+ platform_device_register(&highbank_cpuidle_device);
+}
+
+static const char *const highbank_match[] __initconst = {
+ "calxeda,highbank",
+ "calxeda,ecx-2000",
+ NULL,
+};
+
+DT_MACHINE_START(HIGHBANK, "Highbank")
+#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
+ .dma_zone_size = (4ULL * SZ_1G),
+#endif
+ .l2c_aux_val = 0,
+ .l2c_aux_mask = ~0,
+ .l2c_write_sec = highbank_l2c310_write_sec,
+ .init_irq = highbank_init_irq,
+ .init_machine = highbank_init,
+ .dt_compat = highbank_match,
+ .restart = highbank_restart,
+MACHINE_END
diff --git a/kernel/arch/arm/mach-highbank/pm.c b/kernel/arch/arm/mach-highbank/pm.c
new file mode 100644
index 000000000..7f2bd85eb
--- /dev/null
+++ b/kernel/arch/arm/mach-highbank/pm.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright 2011 Calxeda, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/cpu_pm.h>
+#include <linux/init.h>
+#include <linux/suspend.h>
+
+#include <asm/suspend.h>
+#include <asm/psci.h>
+
+static int highbank_suspend_finish(unsigned long val)
+{
+ const struct psci_power_state ps = {
+ .type = PSCI_POWER_STATE_TYPE_POWER_DOWN,
+ .affinity_level = 1,
+ };
+
+ return psci_ops.cpu_suspend(ps, __pa(cpu_resume));
+}
+
+static int highbank_pm_enter(suspend_state_t state)
+{
+ cpu_pm_enter();
+ cpu_cluster_pm_enter();
+
+ cpu_suspend(0, highbank_suspend_finish);
+
+ cpu_cluster_pm_exit();
+ cpu_pm_exit();
+
+ return 0;
+}
+
+static const struct platform_suspend_ops highbank_pm_ops = {
+ .enter = highbank_pm_enter,
+ .valid = suspend_valid_only_mem,
+};
+
+void __init highbank_pm_init(void)
+{
+ if (!psci_ops.cpu_suspend)
+ return;
+
+ suspend_set_ops(&highbank_pm_ops);
+}
diff --git a/kernel/arch/arm/mach-highbank/smc.S b/kernel/arch/arm/mach-highbank/smc.S
new file mode 100644
index 000000000..407d17baa
--- /dev/null
+++ b/kernel/arch/arm/mach-highbank/smc.S
@@ -0,0 +1,27 @@
+/*
+ * Copied from omap44xx-smc.S Copyright (C) 2010 Texas Instruments, Inc.
+ * Copyright 2012 Calxeda, Inc.
+ *
+ * This program is free software,you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/linkage.h>
+
+/*
+ * This is common routine to manage secure monitor API
+ * used to modify the PL310 secure registers.
+ * 'r0' contains the value to be modified and 'r12' contains
+ * the monitor API number.
+ * Function signature : void highbank_smc1(u32 fn, u32 arg)
+ */
+
+ENTRY(highbank_smc1)
+ stmfd sp!, {r4-r11, lr}
+ mov r12, r0
+ mov r0, r1
+ dsb
+ smc #0
+ ldmfd sp!, {r4-r11, pc}
+ENDPROC(highbank_smc1)
diff --git a/kernel/arch/arm/mach-highbank/sysregs.h b/kernel/arch/arm/mach-highbank/sysregs.h
new file mode 100644
index 000000000..5995df7f2
--- /dev/null
+++ b/kernel/arch/arm/mach-highbank/sysregs.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright 2011 Calxeda, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef _MACH_HIGHBANK__SYSREGS_H_
+#define _MACH_HIGHBANK__SYSREGS_H_
+
+#include <linux/io.h>
+#include <linux/smp.h>
+#include <asm/smp_plat.h>
+#include <asm/smp_scu.h>
+#include "core.h"
+
+extern void __iomem *sregs_base;
+
+#define HB_SREG_A9_PWR_REQ 0xf00
+#define HB_SREG_A9_BOOT_STAT 0xf04
+#define HB_SREG_A9_BOOT_DATA 0xf08
+
+#define HB_PWR_SUSPEND 0
+#define HB_PWR_SOFT_RESET 1
+#define HB_PWR_HARD_RESET 2
+#define HB_PWR_SHUTDOWN 3
+
+#define SREG_CPU_PWR_CTRL(c) (0x200 + ((c) * 4))
+
+static inline void highbank_set_core_pwr(void)
+{
+ int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0);
+ if (scu_base_addr)
+ scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
+ else
+ writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu));
+}
+
+static inline void highbank_clear_core_pwr(void)
+{
+ int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0);
+ if (scu_base_addr)
+ scu_power_mode(scu_base_addr, SCU_PM_NORMAL);
+ else
+ writel_relaxed(0, sregs_base + SREG_CPU_PWR_CTRL(cpu));
+}
+
+static inline void highbank_set_pwr_suspend(void)
+{
+ writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ);
+ highbank_set_core_pwr();
+}
+
+static inline void highbank_set_pwr_shutdown(void)
+{
+ writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ);
+ highbank_set_core_pwr();
+}
+
+static inline void highbank_set_pwr_soft_reset(void)
+{
+ writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
+ highbank_set_core_pwr();
+}
+
+static inline void highbank_set_pwr_hard_reset(void)
+{
+ writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
+ highbank_set_core_pwr();
+}
+
+static inline void highbank_clear_pwr_request(void)
+{
+ writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ);
+ highbank_clear_core_pwr();
+}
+
+#endif
diff --git a/kernel/arch/arm/mach-highbank/system.c b/kernel/arch/arm/mach-highbank/system.c
new file mode 100644
index 000000000..2df5870b7
--- /dev/null
+++ b/kernel/arch/arm/mach-highbank/system.c
@@ -0,0 +1,33 @@
+/*
+ * Copyright 2011 Calxeda, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/io.h>
+#include <asm/proc-fns.h>
+#include <linux/reboot.h>
+
+#include "core.h"
+#include "sysregs.h"
+
+void highbank_restart(enum reboot_mode mode, const char *cmd)
+{
+ if (mode == REBOOT_HARD)
+ highbank_set_pwr_hard_reset();
+ else
+ highbank_set_pwr_soft_reset();
+
+ while (1)
+ cpu_do_idle();
+}
+