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================================
OPNFV traffic profile guidelines
================================

.. contents::

.. _introduction:

------------
Introduction
------------

In order to have consistent testing profiles, it has been suggested to define and store traffic profiles.
These profiles shall be based on operator representative scenario. 

These reference profiles may be used by any test projects, unitary, functional or performance tests. 
It is possible to adapt them to specific testcases. 
It is recommended to use them in order to avoid getting as many profiles as tests. 
It should be helpful to compare the results of test scenario.

.. _howto:

-------------------------
How to use these profiles
-------------------------

The directory of the traffic profiles may be described as follow::

 ├── commons
   ├── ims
   │   └── readme.rst
   ├── mobile
   │   └── readme.rst
   └── traffic-profile-guidelines.rst

the readme.rst details the profile.


.. _overview:

------------------------
Traffic profile overview
------------------------

The current profiles are available:
 * Mobile traffic
 * IMS residential traffic
 * ...

Mobile traffic
==============

IMS residential traffic
=======================





.. _reference:

---------
reference
---------
b">tristate "Texas Instruments EMIF driver" depends on ARCH_OMAP2PLUS select DDR help This driver is for the EMIF module available in Texas Instruments SoCs. EMIF is an SDRAM controller that, based on its revision, supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols. This driver takes care of only LPDDR2 memories presently. The functions of the driver includes re-configuring AC timing parameters and other settings during frequency, voltage and temperature changes config OMAP_GPMC bool help This driver is for the General Purpose Memory Controller (GPMC) present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows interfacing to a variety of asynchronous as well as synchronous memory drives like NOR, NAND, OneNAND, SRAM. config OMAP_GPMC_DEBUG bool "Enable GPMC debug output and skip reset of GPMC during init" depends on OMAP_GPMC help Enables verbose debugging mostly to decode the bootloader provided timings. To preserve the bootloader provided timings, the reset of GPMC is skipped during init. Enable this during development to configure devices connected to the GPMC bus. NOTE: In addition to matching the register setup with the bootloader you also need to match the GPMC FCLK frequency used by the bootloader or else the GPMC timings won't be identical with the bootloader timings. config MVEBU_DEVBUS bool "Marvell EBU Device Bus Controller" default y depends on PLAT_ORION && OF help This driver is for the Device Bus controller available in some Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and Armada 370 and Armada XP. This controller allows to handle flash devices such as NOR, NAND, SRAM, and FPGA. config TEGRA20_MC bool "Tegra20 Memory Controller(MC) driver" default y depends on ARCH_TEGRA_2x_SOC help This driver is for the Memory Controller(MC) module available in Tegra20 SoCs, mainly for a address translation fault analysis, especially for IOMMU/GART(Graphics Address Relocation Table) module. config FSL_CORENET_CF tristate "Freescale CoreNet Error Reporting" depends on FSL_SOC_BOOKE help Say Y for reporting of errors from the Freescale CoreNet Coherency Fabric. Errors reported include accesses to physical addresses that mapped by no local access window (LAW) or an invalid LAW, as well as bad cache state that represents a coherency violation. config FSL_IFC bool depends on FSL_SOC config JZ4780_NEMC bool "Ingenic JZ4780 SoC NEMC driver" default y depends on MACH_JZ4780 help This driver is for the NAND/External Memory Controller (NEMC) in the Ingenic JZ4780. This controller is used to handle external memory devices such as NAND and SRAM. source "drivers/memory/tegra/Kconfig" endif