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authorShubham Mishra <shivam828787@gmail.com>2020-06-29 18:19:05 +0530
committerShubham Mishra <shivam828787@gmail.com>2020-07-14 21:34:11 +0530
commit0ca69e673a3c49acbb02b19df097bdf57f263a47 (patch)
treef439133e18fd556973de67817d188f37f3637ede
parent5ea4ca492b80712a822774cf50ee9864cbbb37ea (diff)
add unittest, create_real_url() function
Change-Id: Id89b7dc6050746c677a361d8d2e66e4c5f329f1d Signed-off-by: Shubham Mishra <shivam828787@gmail.com>
-rw-r--r--hdv/redfish/test/__init__.py0
-rw-r--r--hdv/redfish/test/mock_server.json50
-rw-r--r--hdv/redfish/test/sample_test_cases.yml69
-rw-r--r--hdv/redfish/test/test_hdv_redfish.py41
4 files changed, 160 insertions, 0 deletions
diff --git a/hdv/redfish/test/__init__.py b/hdv/redfish/test/__init__.py
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/hdv/redfish/test/__init__.py
diff --git a/hdv/redfish/test/mock_server.json b/hdv/redfish/test/mock_server.json
new file mode 100644
index 0000000..acf7e9a
--- /dev/null
+++ b/hdv/redfish/test/mock_server.json
@@ -0,0 +1,50 @@
+{
+ "/redfish/v1/Systems/": {
+ "return_code": 200,
+ "return_value": {
+ "@odata.id": "/redfish/v1/Systems",
+ "@odata.type": "#ComputerSystemCollection.ComputerSystemCollection",
+ "Members": [
+ {
+ "@odata.id": "/redfish/v1/Systems/437XR1138R2"
+ }
+ ],
+ "Members@odata.count": 1,
+ "Name": "Computer System Collection"
+ }
+ },
+ "/redfish/v1/Chassis/": {
+ "return_code": 200,
+ "return_value": {
+ "@odata.id": "/redfish/v1/Chassis",
+ "@odata.type": "#ChassisCollection.ChassisCollection",
+ "Members": [
+ {
+ "@odata.id": "/redfish/v1/Chassis/1U"
+ }
+ ],
+ "Members@odata.count": 1,
+ "Name": "Chassis Collection"
+ }
+ },
+ "/redfish/v1/Systems/437XR1138R2/Processors/": {
+ "return_code": 200,
+ "return_value": {
+ "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors",
+ "@odata.type": "#ProcessorCollection.ProcessorCollection",
+ "Members": [
+ {
+ "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/CPU1"
+ },
+ {
+ "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/CPU2"
+ },
+ {
+ "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1"
+ }
+ ],
+ "Members@odata.count": 3,
+ "Name": "Processors Collection"
+ }
+ }
+} \ No newline at end of file
diff --git a/hdv/redfish/test/sample_test_cases.yml b/hdv/redfish/test/sample_test_cases.yml
new file mode 100644
index 0000000..8a732b2
--- /dev/null
+++ b/hdv/redfish/test/sample_test_cases.yml
@@ -0,0 +1,69 @@
+---
+- case_name: get asset code
+ case_sn: 1
+ enabled: false
+ expected_code: 200
+ expected_result:
+ AssetTag: CM_cc@1234
+ group: asset managment
+ header: null
+ method: GET
+ request_body: null
+ url: /redfish/v1/Systems/{system_id}
+ key_flag_dict:
+ system_id: Members
+
+- case_name: check main board name
+ case_sn: 8
+ enabled: true
+ expected_code: 200
+ expected_result:
+ Oem:
+ Mainboard:
+ BoardName: RS33M2C9S
+ group: asset managment
+ header: null
+ method: GET
+ request_body: null
+ url: /redfish/v1/Chassis/{chassis_id}
+ key_flag_dict:
+ chassis_id: Members
+
+- case_name: check CPU amount
+ case_sn: 11
+ enabled: true
+ expected_code: 200
+ expected_result:
+ Members@odata.count: 2
+ group: compoment management
+ header: null
+ method: GET
+ request_body: null
+ url: /redfish/v1/Systems/{system_id}/Processors
+ key_flag_dict:
+ system_id: Members
+
+- case_name: check CPU info
+ case_sn: 2
+ enabled: true
+ expected_code: 200
+ expected_result:
+ count: 2
+ Manufacturer: "Intel(R) Corporation"
+ MaxSpeedMHz: 2300
+ Model: "Intel(R) Xeon(R) Gold 5218N CPU @ 2.30GHz"
+ ProcessorArchitecture: ["x86", "IA-64", "ARM", "MIPS", "OEM"]
+ Socket: [1, 2]
+ Status:
+ Health: OK
+ State: Enabled
+ TotalCores: 16
+ TotalThreads: 32
+ group: compoment management
+ header: null
+ method: GET
+ request_body: null
+ url: /redfish/v1/Systems/{system_id}/Processors/{cpu_id}
+ key_flag_dict:
+ system_id: Members
+ cpu_id: Members
diff --git a/hdv/redfish/test/test_hdv_redfish.py b/hdv/redfish/test/test_hdv_redfish.py
new file mode 100644
index 0000000..e230b69
--- /dev/null
+++ b/hdv/redfish/test/test_hdv_redfish.py
@@ -0,0 +1,41 @@
+import json
+import yaml
+import pytest
+import hdv.redfish.log_utils
+from hdv.redfish.http_handler import UrllibHttpHandler
+from hdv.redfish.hdv_redfish import create_real_url
+
+sample_case = {}
+
+with open('test/sample_test_cases.yml', 'r') as sample_test_file:
+ sample_case = yaml.load(sample_test_file.read(), Loader=yaml.FullLoader)
+
+@pytest.fixture(autouse=True)
+def mock_response(monkeypatch):
+
+ with open('test/mock_server.json', 'r') as mock_server_file:
+ mock_server = json.load(mock_server_file)
+
+ def mock_get(*args, **kwargs):
+ return mock_server[args[0]]
+
+ monkeypatch.setattr(hdv.redfish.hdv_redfish, "execute_get_url", mock_get)
+
+
+@pytest.mark.parametrize("sampleCase, expected_list", [
+ (sample_case[0], ["/redfish/v1/Systems/437XR1138R2"]),
+ (sample_case[1], ["/redfish/v1/Chassis/1U"]),
+ (sample_case[2], ["/redfish/v1/Systems/437XR1138R2/Processors"]),
+ (sample_case[3], ['/redfish/v1/Systems/437XR1138R2/Processors/CPU1',
+ '/redfish/v1/Systems/437XR1138R2/Processors/CPU2',
+ '/redfish/v1/Systems/437XR1138R2/Processors/FPGA1'])
+])
+def test_create_real_url(sampleCase, expected_list):
+
+ url, key_flag_dict = sampleCase['url'], sampleCase['key_flag_dict']
+ bmc_ip = ""
+ depends_id = {}
+ http_handler = UrllibHttpHandler()
+ url_list = create_real_url(url, depends_id, None, key_flag_dict, http_handler, bmc_ip)
+ #checking if url_list and expected_list have same elements, regarless of order
+ assert expected_list == url_list \ No newline at end of file