diff options
| author |   Radoslaw Jablonski <radoslawx.jablonski@intel.com> | 2018-07-27 15:32:54 +0100 |
|---|---|---|
| committer | Radoslaw Jablonski <radoslawx.jablonski@intel.com> | 2018-09-07 08:45:23 +0100 |
| commit | b20fa77aef9d184afa2dadba619afc12878ae67b (patch) | |
| tree | addad04a31b2a73ed74f9196321ab8461277f731 /src/collectd/collectd_sample_configs-master/intel_pmu.conf | |
| parent | 1db7418e39d41cb92e3b1af71d2cb4b9fabb29f2 (diff) | |
Add support for 'collectd-master' container
'collectd-master' contains development versions of collectd
with the latest features. It is based on master branch from
collect repository.
Change-Id: I720b5e5938b402281674ee73851c5f611e4d1178
Signed-off-by: Radoslaw Jablonski <radoslawx.jablonski@intel.com>
Diffstat (limited to 'src/collectd/collectd_sample_configs-master/intel_pmu.conf')
| -rw-r--r-- | src/collectd/collectd_sample_configs-master/intel_pmu.conf | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/src/collectd/collectd_sample_configs-master/intel_pmu.conf b/src/collectd/collectd_sample_configs-master/intel_pmu.conf new file mode 100644 index 00000000..959fb8a1 --- /dev/null +++ b/src/collectd/collectd_sample_configs-master/intel_pmu.conf @@ -0,0 +1,23 @@ +# Copyright 2017 OPNFV +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +LoadPlugin intel_pmu + +<Plugin intel_pmu> + ReportHardwareCacheEvents true + ReportKernelPMUEvents true + ReportSoftwareEvents true +# EventList "/var/cache/pmu/GenuineIntel-6-2D-core.json" +# HardwareEvents "L2_RQSTS.CODE_RD_HIT,L2_RQSTS.CODE_RD_MISS" "L2_RQSTS.ALL_CODE_RD" + Cores "[0-4]" +</Plugin> |