/* * Test Server * * Copyright IBM, Corp. 2011 * * Authors: * Anthony Liguori * * This work is licensed under the terms of the GNU GPL, version 2 or later. * See the COPYING file in the top-level directory. * */ #include "qemu/osdep.h" #include "qapi/error.h" #include "sysemu/qtest.h" #include "hw/qdev.h" #include "sysemu/char.h" #include "exec/ioport.h" #include "exec/memory.h" #include "hw/irq.h" #include "sysemu/accel.h" #include "sysemu/sysemu.h" #include "sysemu/cpus.h" #include "qemu/config-file.h" #include "qemu/option.h" #include "qemu/error-report.h" #define MAX_IRQ 256 bool qtest_allowed; static DeviceState *irq_intercept_dev; static FILE *qtest_log_fp; static CharDriverState *qtest_chr; static GString *inbuf; static int irq_levels[MAX_IRQ]; static qemu_timeval start_time; static bool qtest_opened; #define FMT_timeval "%ld.%06ld" /** * QTest Protocol * * Line based protocol, request/response based. Server can send async messages * so clients should always handle many async messages before the response * comes in. * * Valid requests * * Clock management: * * The qtest client is completely in charge of the QEMU_CLOCK_VIRTUAL. qtest commands * let you adjust the value of the clock (monotonically). All the commands * return the current value of the clock in nanoseconds. * * > clock_step * < OK VALUE * * Advance the clock to the next deadline. Useful when waiting for * asynchronous events. * * > clock_step NS * < OK VALUE * * Advance the clock by NS nanoseconds. * * > clock_set NS * < OK VALUE * * Advance the clock to NS nanoseconds (do nothing if it's already past). * * PIO and memory access: * * > outb ADDR VALUE * < OK * * > outw ADDR VALUE * < OK * * > outl ADDR VALUE * < OK * * > inb ADDR * < OK VALUE * * > inw ADDR * < OK VALUE * * > inl ADDR * < OK VALUE * * > writeb ADDR VALUE * < OK * * > writew ADDR VALUE * < OK * * > writel ADDR VALUE * < OK * * > writeq ADDR VALUE * < OK * * > readb ADDR * < OK VALUE * * > readw ADDR * < OK VALUE * * > readl ADDR * < OK VALUE * * > readq ADDR * < OK VALUE * * > read ADDR SIZE * < OK DATA * * > write ADDR SIZE DATA * < OK * * > b64read ADDR SIZE * < OK B64_DATA * * > b64write ADDR SIZE B64_DATA * < OK * * > memset ADDR SIZE VALUE * < OK * * ADDR, SIZE, VALUE are all integers parsed with strtoul() with a base of 0. * * DATA is an arbitrarily long hex number prefixed with '0x'. If it's smaller * than the expected size, the value will be zero filled at the end of the data * sequence. * * B64_DATA is an arbitrarily long base64 encoded string. * If the sizes do not match, the data will be truncated. * * IRQ management: * * > irq_intercept_in QOM-PATH * < OK * * > irq_intercept_out QOM-PATH * < OK * * Attach to the gpio-in (resp. gpio-out) pins exported by the device at * QOM-PATH. When the pin is triggered, one of the following async messages * will be printed to the qtest stream: * * IRQ raise NUM * IRQ lower NUM * * where NUM is an IRQ number. For the PC, interrupts can be intercepted * simply with "irq_intercept_in ioapic" (note that IRQ0 comes out with * NUM=0 even though it is remapped to GSI 2). */ static int hex2nib(char ch) { if (ch >= '0' && ch <= '9') { return ch - '0'; } else if (ch >= 'a' && ch <= 'f') { return 10 + (ch - 'a'); } else if (ch >= 'A' && ch <= 'F') { return 10 + (ch - 'A'); } else { return -1; } } static void qtest_get_time(qemu_timeval *tv) { qemu_gettimeofday(tv); tv->tv_sec -= start_time.tv_sec; tv->tv_usec -= start_time.tv_usec; if (tv->tv_usec < 0) { tv->tv_usec += 1000000; tv->tv_sec -= 1; } } static void qtest_send_prefix(CharDriverState *chr) { qemu_timeval tv; if (!qtest_log_fp || !qtest_opened) { return; } qtest_get_time(&tv); fprintf(qtest_log_fp, "[S +" FMT_timeval "] ", (long) tv.tv_sec, (long) tv.tv_usec); } static void
# The order of packages is significant, because pip processes them in the order
# of appearance. Changing the order has an impact on the overall integration
# process, which may cause wedges in the gate later.

coverage==4.4.2             # Apache 2.0; OSI Approved  Apache Software License; http://www.apache.org/licenses/LICENSE-2.0; http://www.apache.org/licenses/LICENSE-2.0
fixtures==3.0.0             # OSI Approved  BSD License; OSI Approved  Apache Software License
packaging==16.8.0           # BSD or Apache License, Version 2.0
pyflakes==1.0.0             # MIT; OSI Approved  MIT License
pylint==1.8.1               # GPLv2
python-subunit==1.2.0       # OSI Approved  Apache Software License; OSI Approved  BSD License
testrepository==0.0.20      # OSI Approved  BSD License; OSI Approved  Apache Software License
testtools==2.3.0            # OSI Approved  MIT License
unittest2==1.1.0            # OSI Approved  BSD License

# Yardstick F release <-> OpenStack Pike release
openstack_requirements==1.1.0   # OSI Approved  Apache Software License
-e git+https://github.com/openstack/requirements.git@stable/pike#egg=os_requirements
g_strsplit(cmd->str, " ", 0); qtest_process_command(chr, words); g_strfreev(words); g_string_free(cmd, TRUE); } } static void qtest_read(void *opaque, const uint8_t *buf, int size) { CharDriverState *chr = opaque; g_string_append_len(inbuf, (const gchar *)buf, size); qtest_process_inbuf(chr, inbuf); } static int qtest_can_read(void *opaque) { return 1024; } static void qtest_event(void *opaque, int event) { int i; switch (event) { case CHR_EVENT_OPENED: /* * We used to call qemu_system_reset() here, hoping we could * use the same process for multiple tests that way. Never * used. Injects an extra reset even when it's not used, and * that can mess up tests, e.g. -boot once. */ for (i = 0; i < ARRAY_SIZE(irq_levels); i++) { irq_levels[i] = 0; } qemu_gettimeofday(&start_time); qtest_opened = true; if (qtest_log_fp) { fprintf(qtest_log_fp, "[I " FMT_timeval "] OPENED\n", (long) start_time.tv_sec, (long) start_time.tv_usec); } break; case CHR_EVENT_CLOSED: qtest_opened = false; if (qtest_log_fp) { qemu_timeval tv; qtest_get_time(&tv); fprintf(qtest_log_fp, "[I +" FMT_timeval "] CLOSED\n", (long) tv.tv_sec, (long) tv.tv_usec); } break; default: break; } } static int qtest_init_accel(MachineState *ms) { QemuOpts *opts = qemu_opts_create(qemu_find_opts("icount"), NULL, 0, &error_abort); qemu_opt_set(opts, "shift", "0", &error_abort); configure_icount(opts, &error_abort); qemu_opts_del(opts); return 0; } void qtest_init(const char *qtest_chrdev, const char *qtest_log, Error **errp) { CharDriverState *chr; chr = qemu_chr_new("qtest", qtest_chrdev, NULL); if (chr == NULL) { error_setg(errp, "Failed to initialize device for qtest: \"%s\"", qtest_chrdev); return; } if (qtest_log) { if (strcmp(qtest_log, "none") != 0) { qtest_log_fp = fopen(qtest_log, "w+"); } } else { qtest_log_fp = stderr; } qemu_chr_add_handlers(chr, qtest_can_read, qtest_read, qtest_event, chr); qemu_chr_fe_set_echo(chr, true); inbuf = g_string_new(""); qtest_chr = chr; } bool qtest_driver(void) { return qtest_chr; } static void qtest_accel_class_init(ObjectClass *oc, void *data) { AccelClass *ac = ACCEL_CLASS(oc); ac->name = "QTest"; ac->available = qtest_available; ac->init_machine = qtest_init_accel; ac->allowed = &qtest_allowed; } #define TYPE_QTEST_ACCEL ACCEL_CLASS_NAME("qtest") static const TypeInfo qtest_accel_type = { .name = TYPE_QTEST_ACCEL, .parent = TYPE_ACCEL, .class_init = qtest_accel_class_init, }; static void qtest_type_init(void) { type_register_static(&qtest_accel_type); } type_init(qtest_type_init);