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# Copyright (c) 2016-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
#;
[eal options]
-n=4 ; force number of memory channels
no-output=no ; disable DPDK debug output
[port 0]
name=taggd1
mac=hardware
[port 1]
name=plain1
mac=hardware
[defaults]
mempool size=4K
[variables]
$sut_mac0=@@dst_mac0
$sut_mac1=@@dst_mac1
[global]
start time=5
name=MPLS tag/untag
shuffle=yes
[core 0]
mode=master
[core 1]
name=tag1
task=0
mode=gen
tx port=taggd1
bps=1250000000
; Ethernet + MPLS + IP + UDP
pkt inline=${sut_mac0} 70 00 00 00 00 01 88 47 00 00 31 00 45 00 00 1c 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 00 35 00 35 00 08 7c 21 FFFFFFFF
[core 2]
name=udp1
task=0
mode=gen
tx port=plain1
bps=1250000000
; Ethernet + IP + UDP
pkt inline=${sut_mac1} 70 00 00 00 00 02 08 00 45 00 00 1c 00 01 00 00 40 11 f7 7d c0 a8 01 01 c0 a8 01 01 00 35 00 35 00 08 7c 21 FFFFFFFF
[core 3]
task=0
mode=lat
rx port=taggd1
lat pos=46
[core 4]
task=0
mode=lat
rx port=plain1
lat pos=42
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