/* * Driver for Feature Integration Technology Inc. (aka Fintek) LPC CIR * * Copyright (C) 2011 Jarod Wilson * * Special thanks to Fintek for providing hardware and spec sheets. * This driver is based upon the nuvoton, ite and ene drivers for * similar hardware. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of the * License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 * USA */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include #include #include #include #include #include #include #include #include "fintek-cir.h" /* write val to config reg */ static inline void fintek_cr_write(struct fintek_dev *fintek, u8 val, u8 reg) { fit_dbg("%s: reg 0x%02x, val 0x%02x (ip/dp: %02x/%02x)", __func__, reg, val, fintek->cr_ip, fintek->cr_dp); outb(reg, fintek->cr_ip); outb(val, fintek->cr_dp); } /* read val from config reg */ static inline u8 fintek_cr_read(struct fintek_dev *fintek, u8 reg) { u8 val; outb(reg, fintek->cr_ip); val = inb(fintek->cr_dp); fit_dbg("%s: reg 0x%02x, val 0x%02x (ip/dp: %02x/%02x)", __func__, reg, val, fintek->cr_ip, fintek->cr_dp); return val; } /* update config register bit without changing other bits */ static inline void fintek_set_reg_bit(struct fintek_dev *fintek, u8 val, u8 reg) { u8 tmp = fintek_cr_read(fintek, reg) | val; fintek_cr_write(fintek, tmp, reg); } /* clear config register bit without changing other bits */ static inline void fintek_clear_reg_bit(struct fintek_dev *fintek, u8 val, u8 reg) { u8 tmp = fintek_cr_read(fintek, reg) & ~val; fintek_cr_write(fintek, tmp, reg); } /* enter config mode */ static inline void fintek_config_mode_enable(struct fintek_dev *fintek) { /* Enabling Config Mode explicitly requires writing 2x */ outb(CONFIG_REG_ENABLE, fintek->cr_ip); outb(CONFIG_REG_ENABLE, fintek->cr_ip); } /* exit config mode */ static inline void fintek_config_mode_disable(struct fintek_dev *fintek) { outb(CONFIG_REG_DISABLE, fintek->cr_ip); } /* * When you want to address a specific logical device, write its logical * device number to GCR_LOGICAL_DEV_NO */ static inline void fintek_select_logical_dev(struct fintek_dev *fintek, u8 ldev) { fintek_cr_write(fintek, ldev, GCR_LOGICAL_DEV_NO); } /* write val to cir config register */ static inline void fintek_cir_reg_write(struct fintek_dev *fintek, u8 val, u8 offset) { outb(val, fintek->cir_addr + offset); } /* read val from cir config register */ static u8 fintek_cir_reg_read(struct fintek_dev *fintek, u8 offset) { u8 val; val = inb(fintek->cir_addr + offset); return val; } /* dump current cir register contents */ static void cir_dump_regs(struct fintek_dev *fintek) { fintek_config_mode_enable(fintek); fintek_select_logical_dev(fintek, fintek->logical_dev_cir); pr_info("%s: Dump CIR logical device registers:\n", FINTEK_DRIVER_NAME); pr_info(" * CR CIR BASE ADDR: 0x%x\n", (fintek_cr_read(fintek, CIR_CR_BASE_ADDR_HI) << 8) | fintek_cr_read(fintek, CIR_CR_BASE_ADDR_LO)); pr_info(" * CR CIR IRQ NUM: 0x%x\n", fintek_cr_read(fintek, CIR_CR_IRQ_SEL)); fintek_config_mode_disable(fintek); pr_info("%s: Dump CIR registers:\n", FINTEK_DRIVER_NAME); pr_info(" * STATUS: 0x%x\n", fintek_cir_reg_read(fintek, CIR_STATUS)); pr_info(" * CONTROL: 0x%x\n", fintek_cir_reg_read(fintek, CIR_CONTROL)); pr_info(" * RX_DATA: 0x%x\n", fintek_cir_reg_read(fintek, CIR_RX_DATA)); pr_info(" * TX_CONTROL: 0x%x\n", fintek_cir_reg_read(fintek, CIR_TX_CONTROL)); pr_info(" * TX_DATA: 0x%x\n", fintek_cir_reg_read(fintek, CIR_TX_DATA)); } /* detect hardware features */ static int fintek_hw_detect(struct fintek_dev *fintek) { unsigned long flags; u8 chip_major, chip_minor; u8 vendor_major, vendor_minor; u8 portsel, ir_class; u16 vendor, chip; fintek_config_mode_enable(fintek); /* Check if we're using config port 0x4e or 0x2e */ portsel = fintek_cr_read(fintek, GCR_CONFIG_PORT_SEL); if (portsel == 0xff) { fit_pr(KERN_INFO, "first portsel read was bunk, trying alt"); fintek_config_mode_disable(fintek); fintek->cr_ip = CR
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##############################################################################
# Copyright (c) 2017 Huawei Technologies Co.,Ltd and others.
#
# All rights reserved. This program and the accompanying materials
# are made available under the terms of the Apache License, Version 2.0
# which accompanies this distribution, and is available at
# http://www.apache.org/licenses/LICENSE-2.0
##############################################################################

- hosts: localhost
  roles:
    - delete_flavor

- hosts: nodes
  roles:
    - recover_nova_conf

- hosts: controller
  roles:
    - role: restart_nova_service
      service: "nova-scheduler"
    - role: restart_nova_service
      service: "nova-api"
    - role: restart_nova_service
      service: "nova-conductor"

- hosts: compute
  roles:
    - role: restart_nova_service
      service: "nova-compute"
en interrupt */ fintek_enable_cir_irq(fintek); /* Enable CIR logical device */ fintek_config_mode_enable(fintek); fintek_select_logical_dev(fintek, fintek->logical_dev_cir); fintek_cr_write(fintek, LOGICAL_DEV_ENABLE, CIR_CR_DEV_EN); fintek_config_mode_disable(fintek); fintek_cir_regs_init(fintek); return 0; } static void fintek_shutdown(struct pnp_dev *pdev) { struct fintek_dev *fintek = pnp_get_drvdata(pdev); fintek_enable_wake(fintek); } static const struct pnp_device_id fintek_ids[] = { { "FIT0002", 0 }, /* CIR */ { "", 0 }, }; static struct pnp_driver fintek_driver = { .name = FINTEK_DRIVER_NAME, .id_table = fintek_ids, .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, .probe = fintek_probe, .remove = fintek_remove, .suspend = fintek_suspend, .resume = fintek_resume, .shutdown = fintek_shutdown, }; module_param(debug, int, S_IRUGO | S_IWUSR); MODULE_PARM_DESC(debug, "Enable debugging output"); MODULE_DEVICE_TABLE(pnp, fintek_ids); MODULE_DESCRIPTION(FINTEK_DESCRIPTION " driver"); MODULE_AUTHOR("Jarod Wilson "); MODULE_LICENSE("GPL"); module_pnp_driver(fintek_driver);