From 2e2e99676b9abef1e6d936e37055be9f4b2855d9 Mon Sep 17 00:00:00 2001
From: DanielMartinBuckley <daniel.m.buckley@intel.com>
Date: Tue, 5 Sep 2017 19:39:23 +0100
Subject: Addition of PROX NSB tests to yardstick

JIRA: YARDSTICK-802

Addition of PROX L2FWD_Multiflow, ACL, Load Balancing  plus
grafana dashboards

Supports 2 and 4 port Baremetal & Heat

Change-Id: I1f3990d5451de265ee3901302569c355ece3b146
Signed-off-by: Daniel Martin Buckley <daniel.m.buckley@intel.com>
---
 .../vnf_samples/nsut/prox/configs/handle_lb-4.cfg  | 107 +++++++++++++++++++++
 1 file changed, 107 insertions(+)
 create mode 100644 samples/vnf_samples/nsut/prox/configs/handle_lb-4.cfg

(limited to 'samples/vnf_samples/nsut/prox/configs/handle_lb-4.cfg')

diff --git a/samples/vnf_samples/nsut/prox/configs/handle_lb-4.cfg b/samples/vnf_samples/nsut/prox/configs/handle_lb-4.cfg
new file mode 100644
index 000000000..b85e00b5c
--- /dev/null
+++ b/samples/vnf_samples/nsut/prox/configs/handle_lb-4.cfg
@@ -0,0 +1,107 @@
+# Copyright (c) 2016-2017 Intel Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#;
+
+[eal options]
+-n=4
+no-output=no ; disable DPDK debug output
+
+[lua]
+dofile("tuples.lua")
+
+[port 0]
+name=if0
+mac=hardware
+rx desc=4096
+tx desc=2048
+promiscuous=yes
+
+[port 1]
+name=if1
+mac=hardware
+rx desc=2048
+tx desc=2048
+promiscuous=yes
+
+[port 2]
+name=if2
+mac=hardware
+rx desc=2048
+tx desc=2048
+promiscuous=yes
+
+[port 3]
+name=if3
+mac=hardware
+rx desc=2048
+tx desc=2048
+promiscuous=yes
+
+[defaults]
+mempool size=13K
+memcache size=512
+mempool size=16K
+
+[global]
+start time=5
+name=Handle 5 Tuple Load Balance 1-to-4
+
+[core 0]
+mode=master
+
+[core 1]
+name=Handle_LB
+task=0
+mode=lb5tuple
+rx port=if0
+tx cores=2,3,4,5
+drop=no
+
+[core 2]
+name=TX_p0
+task=0
+mode=l2fwd
+dst mac=@@p0
+rx ring=yes
+tx port=if0
+drop=no
+
+[core 3]
+name=TX_p1
+task=0
+mode=l2fwd
+dst mac=@@p1
+rx ring=yes
+tx port=if1
+drop=no
+
+[core 4]
+name=TX_p2
+task=0
+mode=l2fwd
+dst mac=@@p2
+rx ring=yes
+tx port=if2
+drop=no
+
+[core 5]
+name=TX_p3
+task=0
+mode=l2fwd
+dst mac=@@p3
+rx ring=yes
+tx port=if3
+drop=no
+
-- 
cgit 1.2.3-korg