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| author |   JingLu5 <lvjing5@huawei.com> | 2017-03-27 02:15:00 +0000 |
|---|---|---|
| committer | JingLu5 <lvjing5@huawei.com> | 2017-04-13 00:47:44 +0000 |
| commit | a84dfcb92e1de313fea7841224be5a374a2d2184 (patch) | |
| tree | 46ac9553e5464c7499ec9bf1263fe4f2d91abc35 /ansible/roles/vcpu_pin_set_reset | |
| parent | c7114df918ca1d463e49a1c41805e8f414100e7c (diff) | |
Bugfix: fix typo
Change-Id: I9b7cd5f94b1663af3b807ce24c941868b10d85d1
Signed-off-by: JingLu5 <lvjing5@huawei.com>
Diffstat (limited to 'ansible/roles/vcpu_pin_set_reset')
0 files changed, 0 insertions, 0 deletions