/* * pata_sl82c105.c - SL82C105 PATA for new ATA layer * (C) 2005 Red Hat Inc * (C) 2011 Bartlomiej Zolnierkiewicz * * Based in part on linux/drivers/ide/pci/sl82c105.c * SL82C105/Winbond 553 IDE driver * * and in part on the documentation and errata sheet * * * Note: The controller like many controllers has shared timings for * PIO and DMA. We thus flip to the DMA timings in dma_start and flip back * in the dma_stop function. Thus we actually don't need a set_dmamode * method as the PIO method is always called and will set the right PIO * timing parameters. */ #include #include #include #include #include #include #include #define DRV_NAME "pata_sl82c105" #define DRV_VERSION "0.3.3" enum { /* * SL82C105 PCI config register 0x40 bits. */ CTRL_IDE_IRQB = (1 << 30), CTRL_IDE_IRQA = (1 << 28), CTRL_LEGIRQ = (1 << 11), CTRL_P1F16 = (1 << 5), CTRL_P1EN = (1 << 4), CTRL_P0F16 = (1 << 1), CTRL_P0EN = (1 << 0) }; /** * sl82c105_pre_reset - probe begin * @link: ATA link * @deadline: deadline jiffies for the operation * * Set up cable type and use generic probe init */ static int sl82c105_pre_reset(struct ata_link *link, unsigned long deadline) { static const struct pci_bits sl82c105_enable_bits[] = { { 0x40, 1, 0x01, 0x01 }, { 0x40, 1, 0x10, 0x10 } }; struct ata_port *ap = link->ap; struct pci_dev *pdev = to_pci_dev(ap->host->dev); if (ap->port_no && !pci_test_config_bits(pdev, &sl82c105_enable_bits[ap->port_no])) return -ENOENT; return ata_sff_prereset(link, deadline); } /** * sl82c105_configure_piomode - set chip PIO timing * @ap: ATA interface * @adev: ATA device * @pio: PIO mode * * Called to do the PIO mode setup. Our timing registers are shared * so a configure_dmamode call will undo any work we do here and vice * versa */ static void sl82c105_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio) { struct pci_dev *pdev = to_pci_dev(ap->host->dev); static u16 pio_timing[5] = { 0x50D, 0x407, 0x304, 0x242, 0x240 }; u16 dummy; int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno); pci_write_config_word(pdev, timing, pio_timing[pio]); /* Can we lose this oddity of the old driver */ pci_read_config_word(pdev, timing, &dummy); } /** * sl82c105_set_piomode - set initial PIO mode data * @ap: ATA interface * @adev: ATA device * * Called to do the PIO mode setup. Our timing registers are shared * but we want to set the PIO timing by default. */ static void sl82c105_set_piomode(struct ata_port *ap, struct ata_device *adev) { sl82c105_configure_piomode(ap, adev, adev->pio_mode - XFER_PIO_0); } /** * sl82c105_configure_dmamode - set DMA mode in chip * @ap: ATA interface * @adev: ATA device * * Load DMA cycle times into the chip ready for a DMA transfer * to occur. */ static void sl82c105_configure_dmamode(struct ata_port *ap, struct ata_device *adev) { struct pci_dev *pdev = to_pci_dev(ap->host->dev); static u16 dma_timing[3] = { 0x707, 0x201, 0x200 }; u16 dummy; int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno); int dma = adev->dma_mode - XFER_MW_DMA_0; pci_write_config_word(pdev, timing, dma_timing[dma]); /* Can we lose this oddity of the old driver */ pci_read_config_word(pdev, timing, &dummy); } /** * sl82c105_reset_engine - Reset the DMA engine * @ap: ATA interface * * The sl82c105 has some serious problems with the DMA engine * when transfers don't run as expected or ATAPI is used. The * recommended fix is to reset the engine each use using a chip * test register. */ static void sl82c105_reset_engine(struct ata_port *ap) { struct pci_dev *pdev = to_pci_dev(ap->host->dev); u16 val; pci_read_config_word(pdev, 0x7E, &val); pci_write_config_word(pdev, 0x7E, val | 4); pci_write_config_word(pdev, 0x7E, val & ~4); } /** * sl82c105_bmdma_start - DMA engine begin * @qc: ATA command * * Reset the DMA engine each use as recommended by the errata * document. * * FIXME: if we switch clock at BMDMA start/end we might get better * PIO performance on DMA capable devices. */ static void sl82c105_bmdma_start(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; udelay(100); sl82c105_reset_engine(ap); udelay(100); /* Set the clocks for DMA */ sl82c105_configure_dmamode(ap, qc->dev); /* Activate DMA */ ata_bmdma_start(qc); } /** * sl82c105_bmdma_end 
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# Copyright (C) 2012, Stefano Babic <sbabic@denx.de>