#!/usr/bin/env tclsh # Copyright (c) 2014, Ixia # Copyright (c) 2015, Intel Corporation # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # # 3. Neither the name of the copyright holder nor the names of its # contributors may be used to endorse or promote products derived # from this software without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS # FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, # BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; # LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER # CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN # ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE # POSSIBILITY OF SUCH DAMAGE. # This file is a modified version of a script generated by Ixia # IxNetwork. lappend auto_path [list $lib_path] ################################################################### ########################## Configuration ########################## ################################################################### # verify that the IXIA chassis spec is given set reqVars [list "machine" "port" "user" "chassis" "card" "port1" "port2" "output_dir" "bidir"] set rfc2544test "" foreach var $reqVars { set var_ns [namespace which -variable "$var"] if { [string compare $var_ns ""] == 0 } { errorMsg "The '$var' variable is undefined. Did you set it?" return -1 } } # machine configuration set ::IxNserver $machine set ::IxNport $port set ::biDirect $bidir # change to windows path format and append directory set output_dir [string map {"/" "\\"} $output_dir] set output_dir "$output_dir\\rfctests" puts "Output directory is $output_dir" proc startRfc2544Test { testSpec trafficSpec } { # Start RFC2544 quicktest. # Configure global variables. See documentation on 'global' for more # information on why this is necessary # https://www.tcl.tk/man/tcl8.5/tutorial/Tcl13.html global rfc2544test global sg_rfc2544throughput global sg_rfc2544back2back # flow spec set rfc2544TestType [dict get $testSpec rfc2544TestType] set binary [dict get $testSpec binary] set duration [dict get $testSpec duration] if {$binary} { set numTrials [dict get $testSpec trials] set frameRate 100 set tolerance [dict get $testSpec lossrate] set loadType binary } else { set numTrials 1 set frameRate [dict get $testSpec framerate] set tolerance 0.0 set loadType custom } set learningFrames True set L2CountValue 1 set L2Increment False set L3ValueType singleValue set L3CountValue 1 set L4ValueType singleValue set L4CountValue 1 if {$learningFrames} { set learningFrequency oncePerTest set fastPathEnable True } else { set learningFrequency never set fastPathEnable False } set multipleStreams [dict get $testSpec multipleStreams] set streamType [dict get $testSpec streamType] if {($multipleStreams < 0)} { set multipleStreams 0 } elseif {($multipleStreams > 65535)} { set multipleStreams 65535 } if {$multipleStreams} { if {($streamType == "L2")} { set L2CountValue $multipleStreams set L2Increment True } elseif {($streamType == "L3")} { set L3ValueType increment set L3CountValue $multipleStreams } else { set L4ValueType increment set L4CountValue $multipleStreams } } set fastConvergence True set convergenceDuration [expr $duration/10] # traffic spec # extract nested dictionaries set trafficSpec_l2 [dict get $trafficSpec l2] set trafficSpec_l3 [dict get $trafficSpec l3] set trafficSpec_l4 [dict get $trafficSpec l4] set trafficSpec_vlan [dict get $trafficSpec vlan] set frameSize [dict get $trafficSpec_l2 framesize] set srcMac [dict get $trafficSpec_l2 srcmac] set dstMac [dict get $trafficSpec_l2 dstmac] set srcPort [dict get $trafficSpec_l4 srcport] set dstPort [dict get $trafficSpec_l4 dstport] set proto [dict get $trafficSpec_l3 proto] set srcIp [dict get $trafficSpec_l3 srcip] set dstIp [dict get $trafficSpec_l3 dstip] if {$frameSize < 68 } { if {$rfc2544TestType == "back2back"} { puts "WARNING: Packet size too small, packet size will be \
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#ifndef __ASM_MACH_JZ4740_CPU_FEATURE_OVERRIDES_H
#define __ASM_MACH_JZ4740_CPU_FEATURE_OVERRIDES_H
#define cpu_has_tlb 1
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
#define cpu_has_tx39_cache 0
#define cpu_has_fpu 0
#define cpu_has_32fpr 0
#define cpu_has_counter 0
#define cpu_has_watch 1
#define cpu_has_divec 1
#define cpu_has_vce 0
#define cpu_has_cache_cdex_p 0
#define cpu_has_cache_cdex_s 0
#define cpu_has_prefetch 1
#define cpu_has_mcheck 1
#define cpu_has_ejtag 1
#define cpu_has_llsc 1
#define cpu_has_mips16 0
#define cpu_has_mdmx 0
#define cpu_has_mips3d 0
#define cpu_has_smartmips 0
#define kernel_uses_llsc 1
#define cpu_has_vtag_icache 1
#define cpu_has_dc_aliases 0
#define cpu_has_ic_fills_f_dc 0
#define cpu_has_pindexed_dcache 0
#define cpu_has_mips32r1 1
#define cpu_has_mips32r2 0
#define cpu_has_mips64r1 0
#define cpu_has_mips64r2 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_mipsmt 0
#define cpu_has_userlocal 0
#define cpu_has_nofpuex 0
#define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0
#define cpu_has_inclusive_pcaches 0
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
#endif