From e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb Mon Sep 17 00:00:00 2001 From: Yang Zhang Date: Fri, 28 Aug 2015 09:58:54 +0800 Subject: Add qemu 2.4.0 Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang --- .../tests/tcg/mips/mips64-dspr2/precr_sra_r_ph_w.c | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 qemu/tests/tcg/mips/mips64-dspr2/precr_sra_r_ph_w.c (limited to 'qemu/tests/tcg/mips/mips64-dspr2/precr_sra_r_ph_w.c') diff --git a/qemu/tests/tcg/mips/mips64-dspr2/precr_sra_r_ph_w.c b/qemu/tests/tcg/mips/mips64-dspr2/precr_sra_r_ph_w.c new file mode 100644 index 000000000..62d220dca --- /dev/null +++ b/qemu/tests/tcg/mips/mips64-dspr2/precr_sra_r_ph_w.c @@ -0,0 +1,37 @@ +#include"io.h" + +int main(void) +{ + long long rs, rt; + long long result; + + rs = 0x12345678; + rt = 0x87654321; + result = 0x43215678; + + __asm + ("precr_sra_r.ph.w %0, %1, 0x00\n\t" + : "+r"(rt) + : "r"(rs) + ); + if (result != rt) { + printf("precr_sra_r.ph.w error\n"); + return -1; + } + + rs = 0x12345678; + rt = 0x87654321; + result = 0xFFFFFFFFFFFF0000; + + __asm + ("precr_sra_r.ph.w %0, %1, 0x1F\n\t" + : "+r"(rt) + : "r"(rs) + ); + if (result != rt) { + printf("precr_sra_r.ph.w error\n"); + return -1; + } + + return 0; +} -- cgit 1.2.3-korg