From e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb Mon Sep 17 00:00:00 2001 From: Yang Zhang Date: Fri, 28 Aug 2015 09:58:54 +0800 Subject: Add qemu 2.4.0 Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang --- qemu/tests/tcg/mips/mips64-dspr2/dpsqx_sa_w_ph.c | 53 ++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 qemu/tests/tcg/mips/mips64-dspr2/dpsqx_sa_w_ph.c (limited to 'qemu/tests/tcg/mips/mips64-dspr2/dpsqx_sa_w_ph.c') diff --git a/qemu/tests/tcg/mips/mips64-dspr2/dpsqx_sa_w_ph.c b/qemu/tests/tcg/mips/mips64-dspr2/dpsqx_sa_w_ph.c new file mode 100644 index 000000000..24c888134 --- /dev/null +++ b/qemu/tests/tcg/mips/mips64-dspr2/dpsqx_sa_w_ph.c @@ -0,0 +1,53 @@ +#include"io.h" +int main() +{ + long long rs, rt, dsp; + long long ach = 5, acl = 5; + long long resulth, resultl, resultdsp; + + rs = 0xBC0123AD; + rt = 0x01643721; + resulth = 0x00; + resultl = 0x7FFFFFFF; + resultdsp = 0x01; + __asm + ("mthi %0, $ac1\n\t" + "mtlo %1, $ac1\n\t" + "dpsqx_sa.w.ph $ac1, %3, %4\n\t" + "mfhi %0, $ac1\n\t" + "mflo %1, $ac1\n\t" + "rddsp %2\n\t" + : "+r"(ach), "+r"(acl), "=r"(dsp) + : "r"(rs), "r"(rt) + ); + dsp = (dsp >> 17) & 0x01; + if (dsp != resultdsp || ach != resulth || acl != resultl) { + printf("dpsqx_sa.w.ph error\n"); + return -1; + } + + ach = 0x8c0b354A; + acl = 0xbbc02249; + rs = 0x800023AD; + rt = 0x01648000; + resulth = 0xffffffffffffffff; + resultl = 0xffffffff80000000; + resultdsp = 0x01; + __asm + ("mthi %0, $ac1\n\t" + "mtlo %1, $ac1\n\t" + "dpsqx_sa.w.ph $ac1, %3, %4\n\t" + "mfhi %0, $ac1\n\t" + "mflo %1, $ac1\n\t" + "rddsp %2\n\t" + : "+r"(ach), "+r"(acl), "=r"(dsp) + : "r"(rs), "r"(rt) + ); + dsp = (dsp >> 17) & 0x01; + if (dsp != resultdsp || ach != resulth || acl != resultl) { + printf("dpsqx_sa.w.ph error\n"); + return -1; + } + + return 0; +} -- cgit 1.2.3-korg