From e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb Mon Sep 17 00:00:00 2001 From: Yang Zhang Date: Fri, 28 Aug 2015 09:58:54 +0800 Subject: Add qemu 2.4.0 Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang --- qemu/tests/tcg/mips/mips64-dsp/dpsu_h_obr.c | 32 +++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 qemu/tests/tcg/mips/mips64-dsp/dpsu_h_obr.c (limited to 'qemu/tests/tcg/mips/mips64-dsp/dpsu_h_obr.c') diff --git a/qemu/tests/tcg/mips/mips64-dsp/dpsu_h_obr.c b/qemu/tests/tcg/mips/mips64-dsp/dpsu_h_obr.c new file mode 100644 index 000000000..aa0d47a06 --- /dev/null +++ b/qemu/tests/tcg/mips/mips64-dsp/dpsu_h_obr.c @@ -0,0 +1,32 @@ +#include "io.h" + +int main(void) +{ + long long rs, rt; + long long ach = 5, acl = 5; + long long resulth, resultl; + + rs = 0x7878878888886666; + rt = 0x9865454399998888; + + resulth = 0x04; + resultl = 0xFFFFFFFFFFFeF115; + + __asm + ("mthi %0, $ac1\n\t" + "mtlo %1, $ac1\n\t" + "dpsu.h.obr $ac1, %2, %3\n\t" + "mfhi %0, $ac1\n\t" + "mflo %1, $ac1\n\t" + : "+r"(ach), "+r"(acl) + : "r"(rs), "r"(rt) + ); + + if ((ach != resulth) || (acl != resultl)) { + printf("dpsu.h.qbr wrong\n"); + + return -1; + } + + return 0; +} -- cgit 1.2.3-korg