From e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb Mon Sep 17 00:00:00 2001 From: Yang Zhang Date: Fri, 28 Aug 2015 09:58:54 +0800 Subject: Add qemu 2.4.0 Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang --- .../u-boot/drivers/bootcount/bootcount_davinci.c | 42 ++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 qemu/roms/u-boot/drivers/bootcount/bootcount_davinci.c (limited to 'qemu/roms/u-boot/drivers/bootcount/bootcount_davinci.c') diff --git a/qemu/roms/u-boot/drivers/bootcount/bootcount_davinci.c b/qemu/roms/u-boot/drivers/bootcount/bootcount_davinci.c new file mode 100644 index 000000000..fa87b5e7b --- /dev/null +++ b/qemu/roms/u-boot/drivers/bootcount/bootcount_davinci.c @@ -0,0 +1,42 @@ +/* + * (C) Copyright 2011 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * A bootcount driver for the RTC IP block found on many TI platforms. + * This requires the RTC clocks, etc, to be enabled prior to use and + * not all boards with this IP block on it will have the RTC in use. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +void bootcount_store(ulong a) +{ + struct davinci_rtc *reg = + (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR; + + /* + * write RTC kick register to enable write + * for RTC Scratch registers. Scratch0 and 1 are + * used for bootcount values. + */ + writel(RTC_KICK0R_WE, ®->kick0r); + writel(RTC_KICK1R_WE, ®->kick1r); + raw_bootcount_store(®->scratch2, + (BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff)); +} + +ulong bootcount_load(void) +{ + unsigned long val; + struct davinci_rtc *reg = + (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR; + + val = raw_bootcount_load(®->scratch2); + if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) + return 0; + else + return val & 0x0000ffff; +} -- cgit 1.2.3-korg