From e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb Mon Sep 17 00:00:00 2001 From: Yang Zhang Date: Fri, 28 Aug 2015 09:58:54 +0800 Subject: Add qemu 2.4.0 Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang --- .../u-boot/board/renesas/sh7785lcr/sh7785lcr.c | 74 ++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 qemu/roms/u-boot/board/renesas/sh7785lcr/sh7785lcr.c (limited to 'qemu/roms/u-boot/board/renesas/sh7785lcr/sh7785lcr.c') diff --git a/qemu/roms/u-boot/board/renesas/sh7785lcr/sh7785lcr.c b/qemu/roms/u-boot/board/renesas/sh7785lcr/sh7785lcr.c new file mode 100644 index 000000000..622e60261 --- /dev/null +++ b/qemu/roms/u-boot/board/renesas/sh7785lcr/sh7785lcr.c @@ -0,0 +1,74 @@ +/* + * Copyright (C) 2008 Yoshihiro Shimoda + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + puts("BOARD: Renesas Technology Corp. R0P7785LC0011RL\n"); + return 0; +} + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; + printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); + return 0; +} + +static struct pci_controller hose; +void pci_init_board(void) +{ + pci_sh7780_init(&hose); +} + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} + +#if defined(CONFIG_SH_32BIT) +int do_pmb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + /* clear ITLB */ + writel(0x00000004, 0xff000010); + + /* delete PMB for peripheral */ + writel(0, PMB_ADDR_BASE(0)); + writel(0, PMB_DATA_BASE(0)); + writel(0, PMB_ADDR_BASE(1)); + writel(0, PMB_DATA_BASE(1)); + writel(0, PMB_ADDR_BASE(2)); + writel(0, PMB_DATA_BASE(2)); + + /* add PMB for SDRAM(0x40000000 - 0x47ffffff) */ + writel(mk_pmb_addr_val(0x80), PMB_ADDR_BASE(8)); + writel(mk_pmb_data_val(0x40, 0, 1, 1, 0, 1, 1), PMB_DATA_BASE(8)); + writel(mk_pmb_addr_val(0xa0), PMB_ADDR_BASE(12)); + writel(mk_pmb_data_val(0x40, 1, 1, 1, 0, 0, 1), PMB_DATA_BASE(12)); + + return 0; +} + +U_BOOT_CMD( + pmb, 1, 1, do_pmb, + "pmb - PMB setting\n", + "\n" + " - PMB setting for all SDRAM mapping" +); +#endif -- cgit 1.2.3-korg