From bb756eebdac6fd24e8919e2c43f7d2c8c4091f59 Mon Sep 17 00:00:00 2001 From: RajithaY Date: Tue, 25 Apr 2017 03:31:15 -0700 Subject: Adding qemu as a submodule of KVMFORNFV This Patch includes the changes to add qemu as a submodule to kvmfornfv repo and make use of the updated latest qemu for the execution of all testcase Change-Id: I1280af507a857675c7f81d30c95255635667bdd7 Signed-off-by:RajithaY --- qemu/roms/u-boot/board/freescale/mx53loco/Makefile | 9 - .../u-boot/board/freescale/mx53loco/imximage.cfg | 83 ----- .../u-boot/board/freescale/mx53loco/mx53loco.c | 412 --------------------- .../board/freescale/mx53loco/mx53loco_video.c | 114 ------ 4 files changed, 618 deletions(-) delete mode 100644 qemu/roms/u-boot/board/freescale/mx53loco/Makefile delete mode 100644 qemu/roms/u-boot/board/freescale/mx53loco/imximage.cfg delete mode 100644 qemu/roms/u-boot/board/freescale/mx53loco/mx53loco.c delete mode 100644 qemu/roms/u-boot/board/freescale/mx53loco/mx53loco_video.c (limited to 'qemu/roms/u-boot/board/freescale/mx53loco') diff --git a/qemu/roms/u-boot/board/freescale/mx53loco/Makefile b/qemu/roms/u-boot/board/freescale/mx53loco/Makefile deleted file mode 100644 index 70ac6db1f..000000000 --- a/qemu/roms/u-boot/board/freescale/mx53loco/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2011 Freescale Semiconductor, Inc. -# Jason Liu -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y += mx53loco.o -obj-$(CONFIG_VIDEO) += mx53loco_video.o diff --git a/qemu/roms/u-boot/board/freescale/mx53loco/imximage.cfg b/qemu/roms/u-boot/board/freescale/mx53loco/imximage.cfg deleted file mode 100644 index d1c1931e4..000000000 --- a/qemu/roms/u-boot/board/freescale/mx53loco/imximage.cfg +++ /dev/null @@ -1,83 +0,0 @@ -/* - * Copyright (C) 2011 Freescale Semiconductor, Inc. - * Jason Liu - * - * SPDX-License-Identifier: GPL-2.0+ - * - * Refer doc/README.imximage for more details about how-to configure - * and create imximage boot image - * - * The syntax is taken as close as possible with the kwbimage - */ - -/* image version */ -IMAGE_VERSION 2 - -/* - * Boot Device : one of - * spi, sd (the board has no nand neither onenand) - */ -BOOT_FROM sd - -/* - * Device Configuration Data (DCD) - * - * Each entry must have the format: - * Addr-type Address Value - * - * where: - * Addr-type register length (1,2 or 4 bytes) - * Address absolute address of the register - * value value to be stored in the register - */ -DATA 4 0x53fa8554 0x00300000 -DATA 4 0x53fa8558 0x00300040 -DATA 4 0x53fa8560 0x00300000 -DATA 4 0x53fa8564 0x00300040 -DATA 4 0x53fa8568 0x00300040 -DATA 4 0x53fa8570 0x00300000 -DATA 4 0x53fa8574 0x00300000 -DATA 4 0x53fa8578 0x00300000 -DATA 4 0x53fa857c 0x00300040 -DATA 4 0x53fa8580 0x00300040 -DATA 4 0x53fa8584 0x00300000 -DATA 4 0x53fa8588 0x00300000 -DATA 4 0x53fa8590 0x00300040 -DATA 4 0x53fa8594 0x00300000 -DATA 4 0x53fa86f0 0x00300000 -DATA 4 0x53fa86f4 0x00000000 -DATA 4 0x53fa86fc 0x00000000 -DATA 4 0x53fa8714 0x00000000 -DATA 4 0x53fa8718 0x00300000 -DATA 4 0x53fa871c 0x00300000 -DATA 4 0x53fa8720 0x00300000 -DATA 4 0x53fa8724 0x04000000 -DATA 4 0x53fa8728 0x00300000 -DATA 4 0x53fa872c 0x00300000 -DATA 4 0x63fd9088 0x35343535 -DATA 4 0x63fd9090 0x4d444c44 -DATA 4 0x63fd907c 0x01370138 -DATA 4 0x63fd9080 0x013b013c -DATA 4 0x63fd9018 0x00011740 -DATA 4 0x63fd9000 0xc3190000 -DATA 4 0x63fd900c 0x9f5152e3 -DATA 4 0x63fd9010 0xb68e8a63 -DATA 4 0x63fd9014 0x01ff00db -DATA 4 0x63fd902c 0x000026d2 -DATA 4 0x63fd9030 0x009f0e21 -DATA 4 0x63fd9008 0x12273030 -DATA 4 0x63fd9004 0x0002002d -DATA 4 0x63fd901c 0x00008032 -DATA 4 0x63fd901c 0x00008033 -DATA 4 0x63fd901c 0x00028031 -DATA 4 0x63fd901c 0x052080b0 -DATA 4 0x63fd901c 0x04008040 -DATA 4 0x63fd901c 0x0000803a -DATA 4 0x63fd901c 0x0000803b -DATA 4 0x63fd901c 0x00028039 -DATA 4 0x63fd901c 0x05208138 -DATA 4 0x63fd901c 0x04008048 -DATA 4 0x63fd9020 0x00005800 -DATA 4 0x63fd9040 0x05380003 -DATA 4 0x63fd9058 0x00022227 -DATA 4 0x63fd901c 0x00000000 diff --git a/qemu/roms/u-boot/board/freescale/mx53loco/mx53loco.c b/qemu/roms/u-boot/board/freescale/mx53loco/mx53loco.c deleted file mode 100644 index b32a97ff1..000000000 --- a/qemu/roms/u-boot/board/freescale/mx53loco/mx53loco.c +++ /dev/null @@ -1,412 +0,0 @@ -/* - * Copyright (C) 2011 Freescale Semiconductor, Inc. - * Jason Liu - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define MX53LOCO_LCD_POWER IMX_GPIO_NR(3, 24) - -DECLARE_GLOBAL_DATA_PTR; - -static uint32_t mx53_dram_size[2]; - -phys_size_t get_effective_memsize(void) -{ - /* - * WARNING: We must override get_effective_memsize() function here - * to report only the size of the first DRAM bank. This is to make - * U-Boot relocator place U-Boot into valid memory, that is, at the - * end of the first DRAM bank. If we did not override this function - * like so, U-Boot would be placed at the address of the first DRAM - * bank + total DRAM size - sizeof(uboot), which in the setup where - * each DRAM bank contains 512MiB of DRAM would result in placing - * U-Boot into invalid memory area close to the end of the first - * DRAM bank. - */ - return mx53_dram_size[0]; -} - -int dram_init(void) -{ - mx53_dram_size[0] = get_ram_size((void *)PHYS_SDRAM_1, 1 << 30); - mx53_dram_size[1] = get_ram_size((void *)PHYS_SDRAM_2, 1 << 30); - - gd->ram_size = mx53_dram_size[0] + mx53_dram_size[1]; - - return 0; -} - -void dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = mx53_dram_size[0]; - - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = mx53_dram_size[1]; -} - -u32 get_board_rev(void) -{ - struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; - struct fuse_bank *bank = &iim->bank[0]; - struct fuse_bank0_regs *fuse = - (struct fuse_bank0_regs *)bank->fuse_regs; - - int rev = readl(&fuse->gp[6]); - - if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR)) - rev = 0; - - return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8; -} - -#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_ODE) - -static void setup_iomux_uart(void) -{ - static const iomux_v3_cfg_t uart_pads[] = { - NEW_PAD_CTRL(MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, UART_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, UART_PAD_CTRL), - }; - - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); -} - -#ifdef CONFIG_USB_EHCI_MX5 -int board_ehci_hcd_init(int port) -{ - /* request VBUS power enable pin, GPIO7_8 */ - imx_iomux_v3_setup_pad(MX53_PAD_PATA_DA_2__GPIO7_8); - gpio_direction_output(IMX_GPIO_NR(7, 8), 1); - return 0; -} -#endif - -static void setup_iomux_fec(void) -{ - static const iomux_v3_cfg_t fec_pads[] = { - NEW_PAD_CTRL(MX53_PAD_FEC_MDIO__FEC_MDIO, PAD_CTL_HYS | - PAD_CTL_DSE_HIGH | PAD_CTL_PUS_22K_UP | PAD_CTL_ODE), - NEW_PAD_CTRL(MX53_PAD_FEC_MDC__FEC_MDC, PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_FEC_RXD1__FEC_RDATA_1, - PAD_CTL_HYS | PAD_CTL_PKE), - NEW_PAD_CTRL(MX53_PAD_FEC_RXD0__FEC_RDATA_0, - PAD_CTL_HYS | PAD_CTL_PKE), - NEW_PAD_CTRL(MX53_PAD_FEC_TXD1__FEC_TDATA_1, PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_FEC_TXD0__FEC_TDATA_0, PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_FEC_TX_EN__FEC_TX_EN, PAD_CTL_DSE_HIGH), - NEW_PAD_CTRL(MX53_PAD_FEC_REF_CLK__FEC_TX_CLK, - PAD_CTL_HYS | PAD_CTL_PKE), - NEW_PAD_CTRL(MX53_PAD_FEC_RX_ER__FEC_RX_ER, - PAD_CTL_HYS | PAD_CTL_PKE), - NEW_PAD_CTRL(MX53_PAD_FEC_CRS_DV__FEC_RX_DV, - PAD_CTL_HYS | PAD_CTL_PKE), - }; - - imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); -} - -#ifdef CONFIG_FSL_ESDHC -struct fsl_esdhc_cfg esdhc_cfg[2] = { - {MMC_SDHC1_BASE_ADDR}, - {MMC_SDHC3_BASE_ADDR}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret; - - imx_iomux_v3_setup_pad(MX53_PAD_EIM_DA11__GPIO3_11); - gpio_direction_input(IMX_GPIO_NR(3, 11)); - imx_iomux_v3_setup_pad(MX53_PAD_EIM_DA13__GPIO3_13); - gpio_direction_input(IMX_GPIO_NR(3, 13)); - - if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR) - ret = !gpio_get_value(IMX_GPIO_NR(3, 13)); - else - ret = !gpio_get_value(IMX_GPIO_NR(3, 11)); - - return ret; -} - -#define SD_CMD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ - PAD_CTL_PUS_100K_UP) -#define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \ - PAD_CTL_DSE_HIGH) - -int board_mmc_init(bd_t *bis) -{ - static const iomux_v3_cfg_t sd1_pads[] = { - NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD1_CLK__ESDHC1_CLK, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD1_DATA0__ESDHC1_DAT0, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD1_DATA1__ESDHC1_DAT1, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD1_DATA2__ESDHC1_DAT2, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD1_DATA3__ESDHC1_DAT3, SD_PAD_CTRL), - MX53_PAD_EIM_DA13__GPIO3_13, - }; - - static const iomux_v3_cfg_t sd2_pads[] = { - NEW_PAD_CTRL(MX53_PAD_PATA_RESET_B__ESDHC3_CMD, - SD_CMD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_IORDY__ESDHC3_CLK, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA8__ESDHC3_DAT0, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA9__ESDHC3_DAT1, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA10__ESDHC3_DAT2, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA11__ESDHC3_DAT3, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA0__ESDHC3_DAT4, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA1__ESDHC3_DAT5, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA2__ESDHC3_DAT6, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA3__ESDHC3_DAT7, SD_PAD_CTRL), - MX53_PAD_EIM_DA11__GPIO3_11, - }; - - u32 index; - s32 status = 0; - - esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - - for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) { - switch (index) { - case 0: - imx_iomux_v3_setup_multiple_pads(sd1_pads, - ARRAY_SIZE(sd1_pads)); - break; - case 1: - imx_iomux_v3_setup_multiple_pads(sd2_pads, - ARRAY_SIZE(sd2_pads)); - break; - default: - printf("Warning: you configured more ESDHC controller" - "(%d) as supported by the board(2)\n", - CONFIG_SYS_FSL_ESDHC_NUM); - return status; - } - status |= fsl_esdhc_initialize(bis, &esdhc_cfg[index]); - } - - return status; -} -#endif - -#define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_ODE) - -static void setup_iomux_i2c(void) -{ - static const iomux_v3_cfg_t i2c1_pads[] = { - NEW_PAD_CTRL(MX53_PAD_CSI0_DAT8__I2C1_SDA, I2C_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_CSI0_DAT9__I2C1_SCL, I2C_PAD_CTRL), - }; - - imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads)); -} - -static int power_init(void) -{ - unsigned int val; - int ret; - struct pmic *p; - - if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR)) { - ret = pmic_dialog_init(I2C_PMIC); - if (ret) - return ret; - - p = pmic_get("DIALOG_PMIC"); - if (!p) - return -ENODEV; - - /* Set VDDA to 1.25V */ - val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V; - ret = pmic_reg_write(p, DA9053_BUCKCORE_REG, val); - if (ret) { - printf("Writing to BUCKCORE_REG failed: %d\n", ret); - return ret; - } - - pmic_reg_read(p, DA9053_SUPPLY_REG, &val); - val |= DA9052_SUPPLY_VBCOREGO; - ret = pmic_reg_write(p, DA9053_SUPPLY_REG, val); - if (ret) { - printf("Writing to SUPPLY_REG failed: %d\n", ret); - return ret; - } - - /* Set Vcc peripheral to 1.30V */ - ret = pmic_reg_write(p, DA9053_BUCKPRO_REG, 0x62); - if (ret) { - printf("Writing to BUCKPRO_REG failed: %d\n", ret); - return ret; - } - - ret = pmic_reg_write(p, DA9053_SUPPLY_REG, 0x62); - if (ret) { - printf("Writing to SUPPLY_REG failed: %d\n", ret); - return ret; - } - - return ret; - } - - if (!i2c_probe(CONFIG_SYS_FSL_PMIC_I2C_ADDR)) { - ret = pmic_init(I2C_0); - if (ret) - return ret; - - p = pmic_get("FSL_PMIC"); - if (!p) - return -ENODEV; - - /* Set VDDGP to 1.25V for 1GHz on SW1 */ - pmic_reg_read(p, REG_SW_0, &val); - val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_250V_MC34708; - ret = pmic_reg_write(p, REG_SW_0, val); - if (ret) { - printf("Writing to REG_SW_0 failed: %d\n", ret); - return ret; - } - - /* Set VCC as 1.30V on SW2 */ - pmic_reg_read(p, REG_SW_1, &val); - val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_300V_MC34708; - ret = pmic_reg_write(p, REG_SW_1, val); - if (ret) { - printf("Writing to REG_SW_1 failed: %d\n", ret); - return ret; - } - - /* Set global reset timer to 4s */ - pmic_reg_read(p, REG_POWER_CTL2, &val); - val = (val & ~TIMER_MASK_MC34708) | TIMER_4S_MC34708; - ret = pmic_reg_write(p, REG_POWER_CTL2, val); - if (ret) { - printf("Writing to REG_POWER_CTL2 failed: %d\n", ret); - return ret; - } - - /* Set VUSBSEL and VUSBEN for USB PHY supply*/ - pmic_reg_read(p, REG_MODE_0, &val); - val |= (VUSBSEL_MC34708 | VUSBEN_MC34708); - ret = pmic_reg_write(p, REG_MODE_0, val); - if (ret) { - printf("Writing to REG_MODE_0 failed: %d\n", ret); - return ret; - } - - /* Set SWBST to 5V in auto mode */ - val = SWBST_AUTO; - ret = pmic_reg_write(p, SWBST_CTRL, val); - if (ret) { - printf("Writing to SWBST_CTRL failed: %d\n", ret); - return ret; - } - - return ret; - } - - return -1; -} - -static void clock_1GHz(void) -{ - int ret; - u32 ref_clk = MXC_HCLK; - /* - * After increasing voltage to 1.25V, we can switch - * CPU clock to 1GHz and DDR to 400MHz safely - */ - ret = mxc_set_clock(ref_clk, 1000, MXC_ARM_CLK); - if (ret) - printf("CPU: Switch CPU clock to 1GHZ failed\n"); - - ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK); - ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK); - if (ret) - printf("CPU: Switch DDR clock to 400MHz failed\n"); -} - -int board_early_init_f(void) -{ - setup_iomux_uart(); - setup_iomux_fec(); - setup_iomux_lcd(); - - return 0; -} - -#if defined(CONFIG_DISPLAY_CPUINFO) -int print_cpuinfo(void) -{ - u32 cpurev; - - cpurev = get_cpu_rev(); - printf("CPU: Freescale i.MX%x family rev%d.%d at %d MHz\n", - (cpurev & 0xFF000) >> 12, - (cpurev & 0x000F0) >> 4, - (cpurev & 0x0000F) >> 0, - mxc_get_clock(MXC_ARM_CLK) / 1000000); - printf("Reset cause: %s\n", get_reset_cause()); - return 0; -} -#endif - -/* - * Do not overwrite the console - * Use always serial for U-Boot console - */ -int overwrite_console(void) -{ - return 1; -} - -int board_init(void) -{ - gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; - - mxc_set_sata_internal_clock(); - setup_iomux_i2c(); - - return 0; -} - -int board_late_init(void) -{ - if (!power_init()) - clock_1GHz(); - print_cpuinfo(); - - return 0; -} - -int checkboard(void) -{ - puts("Board: MX53 LOCO\n"); - - return 0; -} diff --git a/qemu/roms/u-boot/board/freescale/mx53loco/mx53loco_video.c b/qemu/roms/u-boot/board/freescale/mx53loco/mx53loco_video.c deleted file mode 100644 index bc5e8a9d3..000000000 --- a/qemu/roms/u-boot/board/freescale/mx53loco/mx53loco_video.c +++ /dev/null @@ -1,114 +0,0 @@ -/* - * Copyright (C) 2012 Freescale Semiconductor, Inc. - * Fabio Estevam - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include -#include -#include - -#define MX53LOCO_LCD_POWER IMX_GPIO_NR(3, 24) - -static struct fb_videomode const claa_wvga = { - .name = "CLAA07LC0ACW", - .refresh = 57, - .xres = 800, - .yres = 480, - .pixclock = 37037, - .left_margin = 40, - .right_margin = 60, - .upper_margin = 10, - .lower_margin = 10, - .hsync_len = 20, - .vsync_len = 10, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED -}; - -static struct fb_videomode const seiko_wvga = { - .name = "Seiko-43WVF1G", - .refresh = 60, - .xres = 800, - .yres = 480, - .pixclock = 29851, /* picosecond (33.5 MHz) */ - .left_margin = 89, - .right_margin = 164, - .upper_margin = 23, - .lower_margin = 10, - .hsync_len = 10, - .vsync_len = 10, - .sync = 0, -}; - -void setup_iomux_lcd(void) -{ - static const iomux_v3_cfg_t lcd_pads[] = { - MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK, - MX53_PAD_DI0_PIN15__IPU_DI0_PIN15, - MX53_PAD_DI0_PIN2__IPU_DI0_PIN2, - MX53_PAD_DI0_PIN3__IPU_DI0_PIN3, - MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0, - MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1, - MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2, - MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3, - MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4, - MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5, - MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6, - MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7, - MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8, - MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9, - MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10, - MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11, - MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12, - MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13, - MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14, - MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15, - MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16, - MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17, - MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18, - MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19, - MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20, - MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21, - MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22, - MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23, - }; - - imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads)); - - /* Turn on GPIO backlight */ - imx_iomux_v3_setup_pad(MX53_PAD_EIM_D24__GPIO3_24); - gpio_direction_output(MX53LOCO_LCD_POWER, 1); - - /* Turn on display contrast */ - imx_iomux_v3_setup_pad(MX53_PAD_GPIO_1__GPIO1_1); - gpio_direction_output(IMX_GPIO_NR(1, 1), 1); -} - -int board_video_skip(void) -{ - int ret; - char const *e = getenv("panel"); - - if (e) { - if (strcmp(e, "seiko") == 0) { - ret = ipuv3_fb_init(&seiko_wvga, 0, IPU_PIX_FMT_RGB24); - if (ret) - printf("Seiko cannot be configured: %d\n", ret); - return ret; - } - } - - /* - * 'panel' env variable not found or has different value than 'seiko' - * Defaulting to claa lcd. - */ - ret = ipuv3_fb_init(&claa_wvga, 0, IPU_PIX_FMT_RGB565); - if (ret) - printf("CLAA cannot be configured: %d\n", ret); - return ret; -} -- cgit 1.2.3-korg