From e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb Mon Sep 17 00:00:00 2001 From: Yang Zhang Date: Fri, 28 Aug 2015 09:58:54 +0800 Subject: Add qemu 2.4.0 Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang --- qemu/roms/u-boot/board/bf518f-ezbrd/Makefile | 12 ++ qemu/roms/u-boot/board/bf518f-ezbrd/bf518f-ezbrd.c | 176 +++++++++++++++++++++ 2 files changed, 188 insertions(+) create mode 100644 qemu/roms/u-boot/board/bf518f-ezbrd/Makefile create mode 100644 qemu/roms/u-boot/board/bf518f-ezbrd/bf518f-ezbrd.c (limited to 'qemu/roms/u-boot/board/bf518f-ezbrd') diff --git a/qemu/roms/u-boot/board/bf518f-ezbrd/Makefile b/qemu/roms/u-boot/board/bf518f-ezbrd/Makefile new file mode 100644 index 000000000..3a6abaa63 --- /dev/null +++ b/qemu/roms/u-boot/board/bf518f-ezbrd/Makefile @@ -0,0 +1,12 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := bf518f-ezbrd.o diff --git a/qemu/roms/u-boot/board/bf518f-ezbrd/bf518f-ezbrd.c b/qemu/roms/u-boot/board/bf518f-ezbrd/bf518f-ezbrd.c new file mode 100644 index 000000000..3a94a572e --- /dev/null +++ b/qemu/roms/u-boot/board/bf518f-ezbrd/bf518f-ezbrd.c @@ -0,0 +1,176 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2008-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: ADI BF518F EZ-Board board\n"); + printf(" Support: http://blackfin.uclinux.org/\n"); + return 0; +} + +#if defined(CONFIG_BFIN_MAC) +static void board_init_enetaddr(uchar *mac_addr) +{ +#ifdef CONFIG_SYS_NO_FLASH +# define USE_MAC_IN_FLASH 0 +#else +# define USE_MAC_IN_FLASH 1 +#endif + bool valid_mac = false; + + if (USE_MAC_IN_FLASH) { + /* we cram the MAC in the last flash sector */ + uchar *board_mac_addr = (uchar *)0x203F0096; + if (is_valid_ether_addr(board_mac_addr)) { + memcpy(mac_addr, board_mac_addr, 6); + valid_mac = true; + } + } + + if (!valid_mac) { + puts("Warning: Generating 'random' MAC address\n"); + eth_random_addr(mac_addr); + } + + eth_setenv_enetaddr("ethaddr", mac_addr); +} + +/* Only the first run of boards had a KSZ switch */ +#if defined(CONFIG_BFIN_SPI) && __SILICON_REVISION__ == 0 +# define KSZ_POSSIBLE 1 +#else +# define KSZ_POSSIBLE 0 +#endif + +#define KSZ_MAX_HZ 5000000 + +#define KSZ_WRITE 0x02 +#define KSZ_READ 0x03 + +#define KSZ_REG_CHID 0x00 /* Register 0: Chip ID0 */ +#define KSZ_REG_STPID 0x01 /* Register 1: Chip ID1 / Start Switch */ +#define KSZ_REG_GC9 0x0b /* Register 11: Global Control 9 */ +#define KSZ_REG_P3C0 0x30 /* Register 48: Port 3 Control 0 */ + +static int ksz8893m_transfer(struct spi_slave *slave, uchar dir, uchar reg, + uchar data, uchar result[3]) +{ + unsigned char dout[3] = { dir, reg, data, }; + return spi_xfer(slave, sizeof(dout) * 8, dout, result, SPI_XFER_BEGIN | SPI_XFER_END); +} + +static int ksz8893m_reg_set(struct spi_slave *slave, uchar reg, uchar data) +{ + unsigned char din[3]; + return ksz8893m_transfer(slave, KSZ_WRITE, reg, data, din); +} + +static int ksz8893m_reg_read(struct spi_slave *slave, uchar reg) +{ + int ret; + unsigned char din[3]; + ret = ksz8893m_transfer(slave, KSZ_READ, reg, 0, din); + return ret ? ret : din[2]; +} + +static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask) +{ + return ksz8893m_reg_set(slave, reg, ksz8893m_reg_read(slave, reg) & mask); +} + +static int ksz8893m_reset(struct spi_slave *slave) +{ + int ret = 0; + + /* Disable STPID mode */ + ret |= ksz8893m_reg_clear(slave, KSZ_REG_GC9, 0x01); + + /* Disable VLAN tag insert on Port3 */ + ret |= ksz8893m_reg_clear(slave, KSZ_REG_P3C0, 0x04); + + /* Start switch */ + ret |= ksz8893m_reg_set(slave, KSZ_REG_STPID, 0x01); + + return ret; +} + +static bool board_ksz_init(void) +{ + static bool switch_is_alive = false; + + if (!switch_is_alive) { + struct spi_slave *slave = spi_setup_slave(0, 1, KSZ_MAX_HZ, SPI_MODE_3); + if (slave) { + if (!spi_claim_bus(slave)) { + bool phy_is_ksz = (ksz8893m_reg_read(slave, KSZ_REG_CHID) == 0x88); + int ret = phy_is_ksz ? ksz8893m_reset(slave) : 0; + switch_is_alive = (ret == 0); + spi_release_bus(slave); + } + spi_free_slave(slave); + } + } + + return switch_is_alive; +} + +int board_eth_init(bd_t *bis) +{ + if (KSZ_POSSIBLE) { + if (!board_ksz_init()) + return 0; + } + return bfin_EMAC_initialize(bis); +} +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_BFIN_MAC + uchar enetaddr[6]; + if (!eth_getenv_enetaddr("ethaddr", enetaddr)) + board_init_enetaddr(enetaddr); +#endif + +#ifndef CONFIG_SYS_NO_FLASH + /* we use the last sector for the MAC address / POST LDR */ + extern flash_info_t flash_info[]; + flash_protect(FLAG_PROTECT_SET, 0x203F0000, 0x203FFFFF, &flash_info[0]); +#endif + + return 0; +} + +int board_early_init_f(void) +{ + /* connect async banks by default */ + const unsigned short pins[] = { + P_AMS2, P_AMS3, 0, + }; + return peripheral_request_list(pins, "async"); +} + +#ifdef CONFIG_BFIN_SDH +int board_mmc_init(bd_t *bis) +{ + return bfin_mmc_init(bis); +} +#endif -- cgit 1.2.3-korg