From e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb Mon Sep 17 00:00:00 2001 From: Yang Zhang Date: Fri, 28 Aug 2015 09:58:54 +0800 Subject: Add qemu 2.4.0 Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang --- .../arch/arm/include/asm/arch-tegra124/tegra.h | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 qemu/roms/u-boot/arch/arm/include/asm/arch-tegra124/tegra.h (limited to 'qemu/roms/u-boot/arch/arm/include/asm/arch-tegra124/tegra.h') diff --git a/qemu/roms/u-boot/arch/arm/include/asm/arch-tegra124/tegra.h b/qemu/roms/u-boot/arch/arm/include/asm/arch-tegra124/tegra.h new file mode 100644 index 000000000..86ebd1945 --- /dev/null +++ b/qemu/roms/u-boot/arch/arm/include/asm/arch-tegra124/tegra.h @@ -0,0 +1,32 @@ +/* + * (C) Copyright 2013 + * NVIDIA Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _TEGRA124_H_ +#define _TEGRA124_H_ + +#define CONFIG_TEGRA124 + +#define NV_PA_SDRAM_BASE 0x80000000 +#define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */ +#define NV_PA_MC_BASE 0x70019000 /* Mem Ctlr regs (MCB, etc.) */ +#define NV_PA_AHB_BASE 0x6000C000 /* System regs (AHB, etc.) */ + +#include + +#define BCT_ODMDATA_OFFSET 1704 /* offset to ODMDATA word */ + +#undef NVBOOTINFOTABLE_BCTSIZE +#undef NVBOOTINFOTABLE_BCTPTR +#define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */ +#define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */ + +#define MAX_NUM_CPU 4 +#define MCB_EMEM_ARB_OVERRIDE (NV_PA_MC_BASE + 0xE8) + +#define TEGRA_USB1_BASE 0x7D000000 + +#endif /* _TEGRA124_H_ */ -- cgit 1.2.3-korg