From e09b41010ba33a20a87472ee821fa407a5b8da36 Mon Sep 17 00:00:00 2001 From: José Pekkarinen Date: Mon, 11 Apr 2016 10:41:07 +0300 Subject: These changes are the raw update to linux-4.4.6-rt14. Kernel sources are taken from kernel.org, and rt patch from the rt wiki download page. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit During the rebasing, the following patch collided: Force tick interrupt and get rid of softirq magic(I70131fb85). Collisions have been removed because its logic was found on the source already. Change-Id: I7f57a4081d9deaa0d9ccfc41a6c8daccdee3b769 Signed-off-by: José Pekkarinen --- kernel/drivers/iio/adc/Kconfig | 91 +++-- kernel/drivers/iio/adc/Makefile | 4 +- kernel/drivers/iio/adc/ad7266.c | 1 - kernel/drivers/iio/adc/ad7298.c | 1 - kernel/drivers/iio/adc/ad7476.c | 1 - kernel/drivers/iio/adc/ad7791.c | 1 - kernel/drivers/iio/adc/ad7793.c | 3 +- kernel/drivers/iio/adc/ad7887.c | 1 - kernel/drivers/iio/adc/ad7923.c | 1 - kernel/drivers/iio/adc/ad799x.c | 1 - kernel/drivers/iio/adc/axp288_adc.c | 2 +- kernel/drivers/iio/adc/berlin2-adc.c | 381 +++++++++++++++++++++ kernel/drivers/iio/adc/cc10001_adc.c | 26 +- kernel/drivers/iio/adc/hi8435.c | 534 ++++++++++++++++++++++++++++++ kernel/drivers/iio/adc/max1027.c | 2 +- kernel/drivers/iio/adc/max1363.c | 1 - kernel/drivers/iio/adc/mcp320x.c | 20 +- kernel/drivers/iio/adc/mcp3422.c | 1 - kernel/drivers/iio/adc/qcom-spmi-vadc.c | 4 +- kernel/drivers/iio/adc/ti-adc081c.c | 1 - kernel/drivers/iio/adc/ti-adc128s052.c | 39 ++- kernel/drivers/iio/adc/ti_am335x_adc.c | 85 ++++- kernel/drivers/iio/adc/twl4030-madc.c | 42 ++- kernel/drivers/iio/adc/twl6030-gpadc.c | 1 + kernel/drivers/iio/adc/vf610_adc.c | 350 ++++++++++++++++---- kernel/drivers/iio/adc/xilinx-xadc-core.c | 38 +-- kernel/drivers/iio/adc/xilinx-xadc.h | 2 - 27 files changed, 1472 insertions(+), 162 deletions(-) create mode 100644 kernel/drivers/iio/adc/berlin2-adc.c create mode 100644 kernel/drivers/iio/adc/hi8435.c (limited to 'kernel/drivers/iio/adc') diff --git a/kernel/drivers/iio/adc/Kconfig b/kernel/drivers/iio/adc/Kconfig index 1bcb65b8d..1e7aded53 100644 --- a/kernel/drivers/iio/adc/Kconfig +++ b/kernel/drivers/iio/adc/Kconfig @@ -20,6 +20,9 @@ config AD7266 Say yes here to build support for Analog Devices AD7265 and AD7266 ADCs. + To compile this driver as a module, choose M here: the module will be + called ad7266. + config AD7291 tristate "Analog Devices AD7291 ADC driver" depends on I2C @@ -52,8 +55,6 @@ config AD7476 AD7277, AD7278, AD7475, AD7476, AD7477, AD7478, AD7466, AD7467, AD7468, AD7495, AD7910, AD7920, AD7920 SPI analog to digital converters (ADC). - If unsure, say N (but it's safe to say "Y"). - To compile this driver as a module, choose M here: the module will be called ad7476. @@ -63,8 +64,7 @@ config AD7791 select AD_SIGMA_DELTA help Say yes here to build support for Analog Devices AD7787, AD7788, AD7789, - AD7790 and AD7791 SPI analog to digital converters (ADC). If unsure, say - N (but it is safe to say "Y"). + AD7790 and AD7791 SPI analog to digital converters (ADC). To compile this driver as a module, choose M here: the module will be called ad7791. @@ -76,7 +76,6 @@ config AD7793 help Say yes here to build support for Analog Devices AD7785, AD7792, AD7793, AD7794 and AD7795 SPI analog to digital converters (ADC). - If unsure, say N (but it's safe to say "Y"). To compile this driver as a module, choose M here: the module will be called AD7793. @@ -89,7 +88,6 @@ config AD7887 help Say yes here to build support for Analog Devices AD7887 SPI analog to digital converter (ADC). - If unsure, say N (but it's safe to say "Y"). To compile this driver as a module, choose M here: the module will be called ad7887. @@ -117,6 +115,9 @@ config AD799X i2c analog to digital converters (ADC). Provides direct access via sysfs. + To compile this driver as a module, choose M here: the module will be + called ad799x. + config AT91_ADC tristate "Atmel AT91 ADC" depends on ARCH_AT91 @@ -127,6 +128,9 @@ config AT91_ADC help Say yes here to build support for Atmel AT91 ADC. + To compile this driver as a module, choose M here: the module will be + called at91_adc. + config AXP288_ADC tristate "X-Powers AXP288 ADC driver" depends on MFD_AXP20X @@ -135,14 +139,15 @@ config AXP288_ADC device. Depending on platform configuration, this general purpose ADC can be used for sampling sensors such as thermal resistors. -config DA9150_GPADC - tristate "Dialog DA9150 GPADC driver support" - depends on MFD_DA9150 - help - Say yes here to build support for Dialog DA9150 GPADC. + To compile this driver as a module, choose M here: the module will be + called axp288_adc. - This driver can also be built as a module. If chosen, the module name - will be da9150-gpadc. +config BERLIN2_ADC + tristate "Marvell Berlin2 ADC driver" + depends on ARCH_BERLIN + help + Marvell Berlin2 ADC driver. This ADC has 8 channels, with one used for + temperature measurement. config CC10001_ADC tristate "Cosmic Circuits 10001 ADC driver" @@ -155,6 +160,18 @@ config CC10001_ADC This driver can also be built as a module. If so, the module will be called cc10001_adc. +config DA9150_GPADC + tristate "Dialog DA9150 GPADC driver support" + depends on MFD_DA9150 + help + Say yes here to build support for Dialog DA9150 GPADC. + + This driver can also be built as a module. If chosen, the module name + will be da9150-gpadc. + + To compile this driver as a module, choose M here: the module will be + called berlin2-adc. + config EXYNOS_ADC tristate "Exynos ADC driver support" depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || (OF && COMPILE_TEST) @@ -163,12 +180,29 @@ config EXYNOS_ADC of SoCs for drivers such as the touchscreen and hwmon to use to share this resource. + To compile this driver as a module, choose M here: the module will be + called exynos_adc. + +config HI8435 + tristate "Holt Integrated Circuits HI-8435 threshold detector" + select IIO_TRIGGERED_EVENT + depends on SPI + help + If you say yes here you get support for Holt Integrated Circuits + HI-8435 chip. + + This driver can also be built as a module. If so, the module will be + called hi8435. + config LP8788_ADC tristate "LP8788 ADC driver" depends on MFD_LP8788 help Say yes here to build support for TI LP8788 ADC. + To compile this driver as a module, choose M here: the module will be + called lp8788_adc. + config MAX1027 tristate "Maxim max1027 ADC driver" depends on SPI @@ -178,6 +212,9 @@ config MAX1027 Say yes here to build support for Maxim SPI ADC models max1027, max1029 and max1031. + To compile this driver as a module, choose M here: the module will be + called max1027. + config MAX1363 tristate "Maxim max1363 ADC driver" depends on I2C @@ -194,13 +231,16 @@ config MAX1363 max11646, max11647) Provides direct access via sysfs and buffered data via the iio dev interface. + To compile this driver as a module, choose M here: the module will be + called max1363. + config MCP320X tristate "Microchip Technology MCP3x01/02/04/08" depends on SPI help Say yes here to build support for Microchip Technology's - MCP3001, MCP3002, MCP3004, MCP3008, MCP3201, MCP3202, MCP3204 or - MCP3208 analog to digital converter. + MCP3001, MCP3002, MCP3004, MCP3008, MCP3201, MCP3202, MCP3204, + MCP3208 or MCP3301 analog to digital converter. This driver can also be built as a module. If so, the module will be called mcp320x. @@ -284,11 +324,11 @@ config TI_ADC081C called ti-adc081c. config TI_ADC128S052 - tristate "Texas Instruments ADC128S052" + tristate "Texas Instruments ADC128S052/ADC122S021" depends on SPI help If you say yes here you get support for Texas Instruments ADC128S052 - chip. + and ADC122S021 chips. This driver can also be built as a module. If so, the module will be called ti-adc128s052. @@ -302,15 +342,18 @@ config TI_AM335X_ADC Say yes here to build support for Texas Instruments ADC driver which is also a MFD client. + To compile this driver as a module, choose M here: the module will be + called ti_am335x_adc. + config TWL4030_MADC tristate "TWL4030 MADC (Monitoring A/D Converter)" depends on TWL4030_CORE help - This driver provides support for Triton TWL4030-MADC. The - driver supports both RT and SW conversion methods. + This driver provides support for Triton TWL4030-MADC. The + driver supports both RT and SW conversion methods. - This driver can also be built as a module. If so, the module will be - called twl4030-madc. + This driver can also be built as a module. If so, the module will be + called twl4030-madc. config TWL6030_GPADC tristate "TWL6030 GPADC (General Purpose A/D Converter) Support" @@ -329,6 +372,9 @@ config TWL6030_GPADC config VF610_ADC tristate "Freescale vf610 ADC driver" depends on OF + depends on HAS_IOMEM + select IIO_BUFFER + select IIO_TRIGGERED_BUFFER help Say yes here to support for Vybrid board analog-to-digital converter. Since the IP is used for i.MX6SLX, the driver also support i.MX6SLX. @@ -343,6 +389,9 @@ config VIPERBOARD_ADC Say yes here to access the ADC part of the Nano River Technologies Viperboard. + To compile this driver as a module, choose M here: the module will be + called viperboard_adc. + config XILINX_XADC tristate "Xilinx XADC driver" depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST diff --git a/kernel/drivers/iio/adc/Makefile b/kernel/drivers/iio/adc/Makefile index 3930e63e8..99b37a963 100644 --- a/kernel/drivers/iio/adc/Makefile +++ b/kernel/drivers/iio/adc/Makefile @@ -15,9 +15,11 @@ obj-$(CONFIG_AD7887) += ad7887.o obj-$(CONFIG_AD799X) += ad799x.o obj-$(CONFIG_AT91_ADC) += at91_adc.o obj-$(CONFIG_AXP288_ADC) += axp288_adc.o -obj-$(CONFIG_DA9150_GPADC) += da9150-gpadc.o +obj-$(CONFIG_BERLIN2_ADC) += berlin2-adc.o obj-$(CONFIG_CC10001_ADC) += cc10001_adc.o +obj-$(CONFIG_DA9150_GPADC) += da9150-gpadc.o obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o +obj-$(CONFIG_HI8435) += hi8435.o obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o obj-$(CONFIG_MAX1027) += max1027.o obj-$(CONFIG_MAX1363) += max1363.o diff --git a/kernel/drivers/iio/adc/ad7266.c b/kernel/drivers/iio/adc/ad7266.c index 70f78c306..21e19b60e 100644 --- a/kernel/drivers/iio/adc/ad7266.c +++ b/kernel/drivers/iio/adc/ad7266.c @@ -509,7 +509,6 @@ MODULE_DEVICE_TABLE(spi, ad7266_id); static struct spi_driver ad7266_driver = { .driver = { .name = "ad7266", - .owner = THIS_MODULE, }, .probe = ad7266_probe, .remove = ad7266_remove, diff --git a/kernel/drivers/iio/adc/ad7298.c b/kernel/drivers/iio/adc/ad7298.c index 4a8c0a2f4..62bb8f7ce 100644 --- a/kernel/drivers/iio/adc/ad7298.c +++ b/kernel/drivers/iio/adc/ad7298.c @@ -378,7 +378,6 @@ MODULE_DEVICE_TABLE(spi, ad7298_id); static struct spi_driver ad7298_driver = { .driver = { .name = "ad7298", - .owner = THIS_MODULE, }, .probe = ad7298_probe, .remove = ad7298_remove, diff --git a/kernel/drivers/iio/adc/ad7476.c b/kernel/drivers/iio/adc/ad7476.c index ce400ec17..be85c2a0a 100644 --- a/kernel/drivers/iio/adc/ad7476.c +++ b/kernel/drivers/iio/adc/ad7476.c @@ -302,7 +302,6 @@ MODULE_DEVICE_TABLE(spi, ad7476_id); static struct spi_driver ad7476_driver = { .driver = { .name = "ad7476", - .owner = THIS_MODULE, }, .probe = ad7476_probe, .remove = ad7476_remove, diff --git a/kernel/drivers/iio/adc/ad7791.c b/kernel/drivers/iio/adc/ad7791.c index c19f8fd1b..cf172d58c 100644 --- a/kernel/drivers/iio/adc/ad7791.c +++ b/kernel/drivers/iio/adc/ad7791.c @@ -440,7 +440,6 @@ MODULE_DEVICE_TABLE(spi, ad7791_spi_ids); static struct spi_driver ad7791_driver = { .driver = { .name = "ad7791", - .owner = THIS_MODULE, }, .probe = ad7791_probe, .remove = ad7791_remove, diff --git a/kernel/drivers/iio/adc/ad7793.c b/kernel/drivers/iio/adc/ad7793.c index b84922a4b..4d960d3b9 100644 --- a/kernel/drivers/iio/adc/ad7793.c +++ b/kernel/drivers/iio/adc/ad7793.c @@ -101,7 +101,7 @@ #define AD7795_CH_AIN1M_AIN1M 8 /* AIN1(-) - AIN1(-) */ /* ID Register Bit Designations (AD7793_REG_ID) */ -#define AD7785_ID 0xB +#define AD7785_ID 0x3 #define AD7792_ID 0xA #define AD7793_ID 0xB #define AD7794_ID 0xF @@ -852,7 +852,6 @@ MODULE_DEVICE_TABLE(spi, ad7793_id); static struct spi_driver ad7793_driver = { .driver = { .name = "ad7793", - .owner = THIS_MODULE, }, .probe = ad7793_probe, .remove = ad7793_remove, diff --git a/kernel/drivers/iio/adc/ad7887.c b/kernel/drivers/iio/adc/ad7887.c index 2fd012ee9..2d3c397e6 100644 --- a/kernel/drivers/iio/adc/ad7887.c +++ b/kernel/drivers/iio/adc/ad7887.c @@ -356,7 +356,6 @@ MODULE_DEVICE_TABLE(spi, ad7887_id); static struct spi_driver ad7887_driver = { .driver = { .name = "ad7887", - .owner = THIS_MODULE, }, .probe = ad7887_probe, .remove = ad7887_remove, diff --git a/kernel/drivers/iio/adc/ad7923.c b/kernel/drivers/iio/adc/ad7923.c index 28732c28e..45e29ccd8 100644 --- a/kernel/drivers/iio/adc/ad7923.c +++ b/kernel/drivers/iio/adc/ad7923.c @@ -357,7 +357,6 @@ MODULE_DEVICE_TABLE(spi, ad7923_id); static struct spi_driver ad7923_driver = { .driver = { .name = "ad7923", - .owner = THIS_MODULE, }, .probe = ad7923_probe, .remove = ad7923_remove, diff --git a/kernel/drivers/iio/adc/ad799x.c b/kernel/drivers/iio/adc/ad799x.c index b99de00e5..01d71588d 100644 --- a/kernel/drivers/iio/adc/ad799x.c +++ b/kernel/drivers/iio/adc/ad799x.c @@ -528,7 +528,6 @@ static struct attribute *ad799x_event_attributes[] = { static struct attribute_group ad799x_event_attrs_group = { .attrs = ad799x_event_attributes, - .name = "events", }; static const struct iio_info ad7991_info = { diff --git a/kernel/drivers/iio/adc/axp288_adc.c b/kernel/drivers/iio/adc/axp288_adc.c index 56008a86b..0c904edd6 100644 --- a/kernel/drivers/iio/adc/axp288_adc.c +++ b/kernel/drivers/iio/adc/axp288_adc.c @@ -238,7 +238,7 @@ static int axp288_adc_remove(struct platform_device *pdev) return 0; } -static struct platform_device_id axp288_adc_id_table[] = { +static const struct platform_device_id axp288_adc_id_table[] = { { .name = "axp288_adc" }, {}, }; diff --git a/kernel/drivers/iio/adc/berlin2-adc.c b/kernel/drivers/iio/adc/berlin2-adc.c new file mode 100644 index 000000000..71c806ecc --- /dev/null +++ b/kernel/drivers/iio/adc/berlin2-adc.c @@ -0,0 +1,381 @@ +/* + * Marvell Berlin2 ADC driver + * + * Copyright (C) 2015 Marvell Technology Group Ltd. + * + * Antoine Tenart + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define BERLIN2_SM_CTRL 0x14 +#define BERLIN2_SM_CTRL_SM_SOC_INT BIT(1) +#define BERLIN2_SM_CTRL_SOC_SM_INT BIT(2) +#define BERLIN2_SM_CTRL_ADC_SEL(x) ((x) << 5) /* 0-15 */ +#define BERLIN2_SM_CTRL_ADC_SEL_MASK GENMASK(8, 5) +#define BERLIN2_SM_CTRL_ADC_POWER BIT(9) +#define BERLIN2_SM_CTRL_ADC_CLKSEL_DIV2 (0x0 << 10) +#define BERLIN2_SM_CTRL_ADC_CLKSEL_DIV3 (0x1 << 10) +#define BERLIN2_SM_CTRL_ADC_CLKSEL_DIV4 (0x2 << 10) +#define BERLIN2_SM_CTRL_ADC_CLKSEL_DIV8 (0x3 << 10) +#define BERLIN2_SM_CTRL_ADC_CLKSEL_MASK GENMASK(11, 10) +#define BERLIN2_SM_CTRL_ADC_START BIT(12) +#define BERLIN2_SM_CTRL_ADC_RESET BIT(13) +#define BERLIN2_SM_CTRL_ADC_BANDGAP_RDY BIT(14) +#define BERLIN2_SM_CTRL_ADC_CONT_SINGLE (0x0 << 15) +#define BERLIN2_SM_CTRL_ADC_CONT_CONTINUOUS (0x1 << 15) +#define BERLIN2_SM_CTRL_ADC_BUFFER_EN BIT(16) +#define BERLIN2_SM_CTRL_ADC_VREF_EXT (0x0 << 17) +#define BERLIN2_SM_CTRL_ADC_VREF_INT (0x1 << 17) +#define BERLIN2_SM_CTRL_ADC_ROTATE BIT(19) +#define BERLIN2_SM_CTRL_TSEN_EN BIT(20) +#define BERLIN2_SM_CTRL_TSEN_CLK_SEL_125 (0x0 << 21) /* 1.25 MHz */ +#define BERLIN2_SM_CTRL_TSEN_CLK_SEL_250 (0x1 << 21) /* 2.5 MHz */ +#define BERLIN2_SM_CTRL_TSEN_MODE_0_125 (0x0 << 22) /* 0-125 C */ +#define BERLIN2_SM_CTRL_TSEN_MODE_10_50 (0x1 << 22) /* 10-50 C */ +#define BERLIN2_SM_CTRL_TSEN_RESET BIT(29) +#define BERLIN2_SM_ADC_DATA 0x20 +#define BERLIN2_SM_ADC_MASK GENMASK(9, 0) +#define BERLIN2_SM_ADC_STATUS 0x1c +#define BERLIN2_SM_ADC_STATUS_DATA_RDY(x) BIT(x) /* 0-15 */ +#define BERLIN2_SM_ADC_STATUS_DATA_RDY_MASK GENMASK(15, 0) +#define BERLIN2_SM_ADC_STATUS_INT_EN(x) (BIT(x) << 16) /* 0-15 */ +#define BERLIN2_SM_ADC_STATUS_INT_EN_MASK GENMASK(31, 16) +#define BERLIN2_SM_TSEN_STATUS 0x24 +#define BERLIN2_SM_TSEN_STATUS_DATA_RDY BIT(0) +#define BERLIN2_SM_TSEN_STATUS_INT_EN BIT(1) +#define BERLIN2_SM_TSEN_DATA 0x28 +#define BERLIN2_SM_TSEN_MASK GENMASK(9, 0) +#define BERLIN2_SM_TSEN_CTRL 0x74 +#define BERLIN2_SM_TSEN_CTRL_START BIT(8) +#define BERLIN2_SM_TSEN_CTRL_SETTLING_4 (0x0 << 21) /* 4 us */ +#define BERLIN2_SM_TSEN_CTRL_SETTLING_12 (0x1 << 21) /* 12 us */ +#define BERLIN2_SM_TSEN_CTRL_SETTLING_MASK BIT(21) +#define BERLIN2_SM_TSEN_CTRL_TRIM(x) ((x) << 22) +#define BERLIN2_SM_TSEN_CTRL_TRIM_MASK GENMASK(25, 22) + +struct berlin2_adc_priv { + struct regmap *regmap; + struct mutex lock; + wait_queue_head_t wq; + bool data_available; + int data; +}; + +#define BERLIN2_ADC_CHANNEL(n, t) \ + { \ + .channel = n, \ + .datasheet_name = "channel"#n, \ + .type = t, \ + .indexed = 1, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ + } + +static const struct iio_chan_spec berlin2_adc_channels[] = { + BERLIN2_ADC_CHANNEL(0, IIO_VOLTAGE), /* external input */ + BERLIN2_ADC_CHANNEL(1, IIO_VOLTAGE), /* external input */ + BERLIN2_ADC_CHANNEL(2, IIO_VOLTAGE), /* external input */ + BERLIN2_ADC_CHANNEL(3, IIO_VOLTAGE), /* external input */ + BERLIN2_ADC_CHANNEL(4, IIO_VOLTAGE), /* reserved */ + BERLIN2_ADC_CHANNEL(5, IIO_VOLTAGE), /* reserved */ + { /* temperature sensor */ + .channel = 6, + .datasheet_name = "channel6", + .type = IIO_TEMP, + .indexed = 0, + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), + }, + BERLIN2_ADC_CHANNEL(7, IIO_VOLTAGE), /* reserved */ + IIO_CHAN_SOFT_TIMESTAMP(8), /* timestamp */ +}; + +static int berlin2_adc_read(struct iio_dev *indio_dev, int channel) +{ + struct berlin2_adc_priv *priv = iio_priv(indio_dev); + int data, ret; + + mutex_lock(&priv->lock); + + /* Enable the interrupts */ + regmap_write(priv->regmap, BERLIN2_SM_ADC_STATUS, + BERLIN2_SM_ADC_STATUS_INT_EN(channel)); + + /* Configure the ADC */ + regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL, + BERLIN2_SM_CTRL_ADC_RESET | + BERLIN2_SM_CTRL_ADC_SEL_MASK | + BERLIN2_SM_CTRL_ADC_START, + BERLIN2_SM_CTRL_ADC_SEL(channel) | + BERLIN2_SM_CTRL_ADC_START); + + ret = wait_event_interruptible_timeout(priv->wq, priv->data_available, + msecs_to_jiffies(1000)); + + /* Disable the interrupts */ + regmap_update_bits(priv->regmap, BERLIN2_SM_ADC_STATUS, + BERLIN2_SM_ADC_STATUS_INT_EN(channel), 0); + + if (ret == 0) + ret = -ETIMEDOUT; + if (ret < 0) { + mutex_unlock(&priv->lock); + return ret; + } + + regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL, + BERLIN2_SM_CTRL_ADC_START, 0); + + data = priv->data; + priv->data_available = false; + + mutex_unlock(&priv->lock); + + return data; +} + +static int berlin2_adc_tsen_read(struct iio_dev *indio_dev) +{ + struct berlin2_adc_priv *priv = iio_priv(indio_dev); + int data, ret; + + mutex_lock(&priv->lock); + + /* Enable interrupts */ + regmap_write(priv->regmap, BERLIN2_SM_TSEN_STATUS, + BERLIN2_SM_TSEN_STATUS_INT_EN); + + /* Configure the ADC */ + regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL, + BERLIN2_SM_CTRL_TSEN_RESET | + BERLIN2_SM_CTRL_ADC_ROTATE, + BERLIN2_SM_CTRL_ADC_ROTATE); + + /* Configure the temperature sensor */ + regmap_update_bits(priv->regmap, BERLIN2_SM_TSEN_CTRL, + BERLIN2_SM_TSEN_CTRL_TRIM_MASK | + BERLIN2_SM_TSEN_CTRL_SETTLING_MASK | + BERLIN2_SM_TSEN_CTRL_START, + BERLIN2_SM_TSEN_CTRL_TRIM(3) | + BERLIN2_SM_TSEN_CTRL_SETTLING_12 | + BERLIN2_SM_TSEN_CTRL_START); + + ret = wait_event_interruptible_timeout(priv->wq, priv->data_available, + msecs_to_jiffies(1000)); + + /* Disable interrupts */ + regmap_update_bits(priv->regmap, BERLIN2_SM_TSEN_STATUS, + BERLIN2_SM_TSEN_STATUS_INT_EN, 0); + + if (ret == 0) + ret = -ETIMEDOUT; + if (ret < 0) { + mutex_unlock(&priv->lock); + return ret; + } + + regmap_update_bits(priv->regmap, BERLIN2_SM_TSEN_CTRL, + BERLIN2_SM_TSEN_CTRL_START, 0); + + data = priv->data; + priv->data_available = false; + + mutex_unlock(&priv->lock); + + return data; +} + +static int berlin2_adc_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int *val, + int *val2, long mask) +{ + int temp; + + switch (mask) { + case IIO_CHAN_INFO_RAW: + if (chan->type != IIO_VOLTAGE) + return -EINVAL; + + *val = berlin2_adc_read(indio_dev, chan->channel); + if (*val < 0) + return *val; + + return IIO_VAL_INT; + case IIO_CHAN_INFO_PROCESSED: + if (chan->type != IIO_TEMP) + return -EINVAL; + + temp = berlin2_adc_tsen_read(indio_dev); + if (temp < 0) + return temp; + + if (temp > 2047) + temp -= 4096; + + /* Convert to milli Celsius */ + *val = ((temp * 100000) / 264 - 270000); + return IIO_VAL_INT; + default: + break; + } + + return -EINVAL; +} + +static irqreturn_t berlin2_adc_irq(int irq, void *private) +{ + struct berlin2_adc_priv *priv = iio_priv(private); + unsigned val; + + regmap_read(priv->regmap, BERLIN2_SM_ADC_STATUS, &val); + if (val & BERLIN2_SM_ADC_STATUS_DATA_RDY_MASK) { + regmap_read(priv->regmap, BERLIN2_SM_ADC_DATA, &priv->data); + priv->data &= BERLIN2_SM_ADC_MASK; + + val &= ~BERLIN2_SM_ADC_STATUS_DATA_RDY_MASK; + regmap_write(priv->regmap, BERLIN2_SM_ADC_STATUS, val); + + priv->data_available = true; + wake_up_interruptible(&priv->wq); + } + + return IRQ_HANDLED; +} + +static irqreturn_t berlin2_adc_tsen_irq(int irq, void *private) +{ + struct berlin2_adc_priv *priv = iio_priv(private); + unsigned val; + + regmap_read(priv->regmap, BERLIN2_SM_TSEN_STATUS, &val); + if (val & BERLIN2_SM_TSEN_STATUS_DATA_RDY) { + regmap_read(priv->regmap, BERLIN2_SM_TSEN_DATA, &priv->data); + priv->data &= BERLIN2_SM_TSEN_MASK; + + val &= ~BERLIN2_SM_TSEN_STATUS_DATA_RDY; + regmap_write(priv->regmap, BERLIN2_SM_TSEN_STATUS, val); + + priv->data_available = true; + wake_up_interruptible(&priv->wq); + } + + return IRQ_HANDLED; +} + +static const struct iio_info berlin2_adc_info = { + .driver_module = THIS_MODULE, + .read_raw = berlin2_adc_read_raw, +}; + +static int berlin2_adc_probe(struct platform_device *pdev) +{ + struct iio_dev *indio_dev; + struct berlin2_adc_priv *priv; + struct device_node *parent_np = of_get_parent(pdev->dev.of_node); + int irq, tsen_irq; + int ret; + + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv)); + if (!indio_dev) + return -ENOMEM; + + priv = iio_priv(indio_dev); + platform_set_drvdata(pdev, indio_dev); + + priv->regmap = syscon_node_to_regmap(parent_np); + of_node_put(parent_np); + if (IS_ERR(priv->regmap)) + return PTR_ERR(priv->regmap); + + irq = platform_get_irq_byname(pdev, "adc"); + if (irq < 0) + return irq; + + tsen_irq = platform_get_irq_byname(pdev, "tsen"); + if (tsen_irq < 0) + return tsen_irq; + + ret = devm_request_irq(&pdev->dev, irq, berlin2_adc_irq, 0, + pdev->dev.driver->name, indio_dev); + if (ret) + return ret; + + ret = devm_request_irq(&pdev->dev, tsen_irq, berlin2_adc_tsen_irq, + 0, pdev->dev.driver->name, indio_dev); + if (ret) + return ret; + + init_waitqueue_head(&priv->wq); + mutex_init(&priv->lock); + + indio_dev->dev.parent = &pdev->dev; + indio_dev->name = dev_name(&pdev->dev); + indio_dev->modes = INDIO_DIRECT_MODE; + indio_dev->info = &berlin2_adc_info; + + indio_dev->channels = berlin2_adc_channels; + indio_dev->num_channels = ARRAY_SIZE(berlin2_adc_channels); + + /* Power up the ADC */ + regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL, + BERLIN2_SM_CTRL_ADC_POWER, + BERLIN2_SM_CTRL_ADC_POWER); + + ret = iio_device_register(indio_dev); + if (ret) { + /* Power down the ADC */ + regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL, + BERLIN2_SM_CTRL_ADC_POWER, 0); + return ret; + } + + return 0; +} + +static int berlin2_adc_remove(struct platform_device *pdev) +{ + struct iio_dev *indio_dev = platform_get_drvdata(pdev); + struct berlin2_adc_priv *priv = iio_priv(indio_dev); + + iio_device_unregister(indio_dev); + + /* Power down the ADC */ + regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL, + BERLIN2_SM_CTRL_ADC_POWER, 0); + + return 0; +} + +static const struct of_device_id berlin2_adc_match[] = { + { .compatible = "marvell,berlin2-adc", }, + { }, +}; +MODULE_DEVICE_TABLE(of, berlin2_adc_match); + +static struct platform_driver berlin2_adc_driver = { + .driver = { + .name = "berlin2-adc", + .of_match_table = berlin2_adc_match, + }, + .probe = berlin2_adc_probe, + .remove = berlin2_adc_remove, +}; +module_platform_driver(berlin2_adc_driver); + +MODULE_AUTHOR("Antoine Tenart "); +MODULE_DESCRIPTION("Marvell Berlin2 ADC driver"); +MODULE_LICENSE("GPL v2"); diff --git a/kernel/drivers/iio/adc/cc10001_adc.c b/kernel/drivers/iio/adc/cc10001_adc.c index 115f6e99a..8254f529b 100644 --- a/kernel/drivers/iio/adc/cc10001_adc.c +++ b/kernel/drivers/iio/adc/cc10001_adc.c @@ -62,6 +62,7 @@ struct cc10001_adc_device { struct regulator *reg; u16 *buf; + bool shared; struct mutex lock; unsigned int start_delay_ns; unsigned int eoc_delay_ns; @@ -153,7 +154,8 @@ static irqreturn_t cc10001_adc_trigger_h(int irq, void *p) mutex_lock(&adc_dev->lock); - cc10001_adc_power_up(adc_dev); + if (!adc_dev->shared) + cc10001_adc_power_up(adc_dev); /* Calculate delay step for eoc and sampled data */ delay_ns = adc_dev->eoc_delay_ns / CC10001_MAX_POLL_COUNT; @@ -177,7 +179,8 @@ static irqreturn_t cc10001_adc_trigger_h(int irq, void *p) } done: - cc10001_adc_power_down(adc_dev); + if (!adc_dev->shared) + cc10001_adc_power_down(adc_dev); mutex_unlock(&adc_dev->lock); @@ -196,7 +199,8 @@ static u16 cc10001_adc_read_raw_voltage(struct iio_dev *indio_dev, unsigned int delay_ns; u16 val; - cc10001_adc_power_up(adc_dev); + if (!adc_dev->shared) + cc10001_adc_power_up(adc_dev); /* Calculate delay step for eoc and sampled data */ delay_ns = adc_dev->eoc_delay_ns / CC10001_MAX_POLL_COUNT; @@ -205,7 +209,8 @@ static u16 cc10001_adc_read_raw_voltage(struct iio_dev *indio_dev, val = cc10001_adc_poll_done(indio_dev, chan->channel, delay_ns); - cc10001_adc_power_down(adc_dev); + if (!adc_dev->shared) + cc10001_adc_power_down(adc_dev); return val; } @@ -322,8 +327,10 @@ static int cc10001_adc_probe(struct platform_device *pdev) adc_dev = iio_priv(indio_dev); channel_map = GENMASK(CC10001_ADC_NUM_CHANNELS - 1, 0); - if (!of_property_read_u32(node, "adc-reserved-channels", &ret)) + if (!of_property_read_u32(node, "adc-reserved-channels", &ret)) { + adc_dev->shared = true; channel_map &= ~ret; + } adc_dev->reg = devm_regulator_get(&pdev->dev, "vref"); if (IS_ERR(adc_dev->reg)) @@ -368,6 +375,14 @@ static int cc10001_adc_probe(struct platform_device *pdev) adc_dev->eoc_delay_ns = NSEC_PER_SEC / adc_clk_rate; adc_dev->start_delay_ns = adc_dev->eoc_delay_ns * CC10001_WAIT_CYCLES; + /* + * There is only one register to power-up/power-down the AUX ADC. + * If the ADC is shared among multiple CPUs, always power it up here. + * If the ADC is used only by the MIPS, power-up/power-down at runtime. + */ + if (adc_dev->shared) + cc10001_adc_power_up(adc_dev); + /* Setup the ADC channels available on the device */ ret = cc10001_adc_channel_init(indio_dev, channel_map); if (ret < 0) @@ -402,6 +417,7 @@ static int cc10001_adc_remove(struct platform_device *pdev) struct iio_dev *indio_dev = platform_get_drvdata(pdev); struct cc10001_adc_device *adc_dev = iio_priv(indio_dev); + cc10001_adc_power_down(adc_dev); iio_device_unregister(indio_dev); iio_triggered_buffer_cleanup(indio_dev); clk_disable_unprepare(adc_dev->adc_clk); diff --git a/kernel/drivers/iio/adc/hi8435.c b/kernel/drivers/iio/adc/hi8435.c new file mode 100644 index 000000000..c73c6c62a --- /dev/null +++ b/kernel/drivers/iio/adc/hi8435.c @@ -0,0 +1,534 @@ +/* + * Holt Integrated Circuits HI-8435 threshold detector driver + * + * Copyright (C) 2015 Zodiac Inflight Innovations + * Copyright (C) 2015 Cogent Embedded, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "hi8435" + +/* Register offsets for HI-8435 */ +#define HI8435_CTRL_REG 0x02 +#define HI8435_PSEN_REG 0x04 +#define HI8435_TMDATA_REG 0x1E +#define HI8435_GOCENHYS_REG 0x3A +#define HI8435_SOCENHYS_REG 0x3C +#define HI8435_SO7_0_REG 0x10 +#define HI8435_SO15_8_REG 0x12 +#define HI8435_SO23_16_REG 0x14 +#define HI8435_SO31_24_REG 0x16 +#define HI8435_SO31_0_REG 0x78 + +#define HI8435_WRITE_OPCODE 0x00 +#define HI8435_READ_OPCODE 0x80 + +/* CTRL register bits */ +#define HI8435_CTRL_TEST 0x01 +#define HI8435_CTRL_SRST 0x02 + +struct hi8435_priv { + struct spi_device *spi; + struct mutex lock; + + unsigned long event_scan_mask; /* soft mask/unmask channels events */ + unsigned int event_prev_val; + + unsigned threshold_lo[2]; /* GND-Open and Supply-Open thresholds */ + unsigned threshold_hi[2]; /* GND-Open and Supply-Open thresholds */ + u8 reg_buffer[3] ____cacheline_aligned; +}; + +static int hi8435_readb(struct hi8435_priv *priv, u8 reg, u8 *val) +{ + reg |= HI8435_READ_OPCODE; + return spi_write_then_read(priv->spi, ®, 1, val, 1); +} + +static int hi8435_readw(struct hi8435_priv *priv, u8 reg, u16 *val) +{ + int ret; + __be16 be_val; + + reg |= HI8435_READ_OPCODE; + ret = spi_write_then_read(priv->spi, ®, 1, &be_val, 2); + *val = be16_to_cpu(be_val); + + return ret; +} + +static int hi8435_readl(struct hi8435_priv *priv, u8 reg, u32 *val) +{ + int ret; + __be32 be_val; + + reg |= HI8435_READ_OPCODE; + ret = spi_write_then_read(priv->spi, ®, 1, &be_val, 4); + *val = be32_to_cpu(be_val); + + return ret; +} + +static int hi8435_writeb(struct hi8435_priv *priv, u8 reg, u8 val) +{ + priv->reg_buffer[0] = reg | HI8435_WRITE_OPCODE; + priv->reg_buffer[1] = val; + + return spi_write(priv->spi, priv->reg_buffer, 2); +} + +static int hi8435_writew(struct hi8435_priv *priv, u8 reg, u16 val) +{ + priv->reg_buffer[0] = reg | HI8435_WRITE_OPCODE; + priv->reg_buffer[1] = (val >> 8) & 0xff; + priv->reg_buffer[2] = val & 0xff; + + return spi_write(priv->spi, priv->reg_buffer, 3); +} + +static int hi8435_read_event_config(struct iio_dev *idev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir) +{ + struct hi8435_priv *priv = iio_priv(idev); + + return !!(priv->event_scan_mask & BIT(chan->channel)); +} + +static int hi8435_write_event_config(struct iio_dev *idev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, int state) +{ + struct hi8435_priv *priv = iio_priv(idev); + + priv->event_scan_mask &= ~BIT(chan->channel); + if (state) + priv->event_scan_mask |= BIT(chan->channel); + + return 0; +} + +static int hi8435_read_event_value(struct iio_dev *idev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int *val, int *val2) +{ + struct hi8435_priv *priv = iio_priv(idev); + int ret; + u8 mode, psen; + u16 reg; + + ret = hi8435_readb(priv, HI8435_PSEN_REG, &psen); + if (ret < 0) + return ret; + + /* Supply-Open or GND-Open sensing mode */ + mode = !!(psen & BIT(chan->channel / 8)); + + ret = hi8435_readw(priv, mode ? HI8435_SOCENHYS_REG : + HI8435_GOCENHYS_REG, ®); + if (ret < 0) + return ret; + + if (dir == IIO_EV_DIR_FALLING) + *val = ((reg & 0xff) - (reg >> 8)) / 2; + else if (dir == IIO_EV_DIR_RISING) + *val = ((reg & 0xff) + (reg >> 8)) / 2; + + return IIO_VAL_INT; +} + +static int hi8435_write_event_value(struct iio_dev *idev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int val, int val2) +{ + struct hi8435_priv *priv = iio_priv(idev); + int ret; + u8 mode, psen; + u16 reg; + + ret = hi8435_readb(priv, HI8435_PSEN_REG, &psen); + if (ret < 0) + return ret; + + /* Supply-Open or GND-Open sensing mode */ + mode = !!(psen & BIT(chan->channel / 8)); + + ret = hi8435_readw(priv, mode ? HI8435_SOCENHYS_REG : + HI8435_GOCENHYS_REG, ®); + if (ret < 0) + return ret; + + if (dir == IIO_EV_DIR_FALLING) { + /* falling threshold range 2..21V, hysteresis minimum 2V */ + if (val < 2 || val > 21 || (val + 2) > priv->threshold_hi[mode]) + return -EINVAL; + + if (val == priv->threshold_lo[mode]) + return 0; + + priv->threshold_lo[mode] = val; + + /* hysteresis must not be odd */ + if ((priv->threshold_hi[mode] - priv->threshold_lo[mode]) % 2) + priv->threshold_hi[mode]--; + } else if (dir == IIO_EV_DIR_RISING) { + /* rising threshold range 3..22V, hysteresis minimum 2V */ + if (val < 3 || val > 22 || val < (priv->threshold_lo[mode] + 2)) + return -EINVAL; + + if (val == priv->threshold_hi[mode]) + return 0; + + priv->threshold_hi[mode] = val; + + /* hysteresis must not be odd */ + if ((priv->threshold_hi[mode] - priv->threshold_lo[mode]) % 2) + priv->threshold_lo[mode]++; + } + + /* program thresholds */ + mutex_lock(&priv->lock); + + ret = hi8435_readw(priv, mode ? HI8435_SOCENHYS_REG : + HI8435_GOCENHYS_REG, ®); + if (ret < 0) { + mutex_unlock(&priv->lock); + return ret; + } + + /* hysteresis */ + reg = priv->threshold_hi[mode] - priv->threshold_lo[mode]; + reg <<= 8; + /* threshold center */ + reg |= (priv->threshold_hi[mode] + priv->threshold_lo[mode]); + + ret = hi8435_writew(priv, mode ? HI8435_SOCENHYS_REG : + HI8435_GOCENHYS_REG, reg); + + mutex_unlock(&priv->lock); + + return ret; +} + +static int hi8435_debugfs_reg_access(struct iio_dev *idev, + unsigned reg, unsigned writeval, + unsigned *readval) +{ + struct hi8435_priv *priv = iio_priv(idev); + int ret; + u8 val; + + if (readval != NULL) { + ret = hi8435_readb(priv, reg, &val); + *readval = val; + } else { + val = (u8)writeval; + ret = hi8435_writeb(priv, reg, val); + } + + return ret; +} + +static const struct iio_event_spec hi8435_events[] = { + { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_RISING, + .mask_separate = BIT(IIO_EV_INFO_VALUE), + }, { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_FALLING, + .mask_separate = BIT(IIO_EV_INFO_VALUE), + }, { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_EITHER, + .mask_separate = BIT(IIO_EV_INFO_ENABLE), + }, +}; + +static int hi8435_get_sensing_mode(struct iio_dev *idev, + const struct iio_chan_spec *chan) +{ + struct hi8435_priv *priv = iio_priv(idev); + int ret; + u8 reg; + + ret = hi8435_readb(priv, HI8435_PSEN_REG, ®); + if (ret < 0) + return ret; + + return !!(reg & BIT(chan->channel / 8)); +} + +static int hi8435_set_sensing_mode(struct iio_dev *idev, + const struct iio_chan_spec *chan, + unsigned int mode) +{ + struct hi8435_priv *priv = iio_priv(idev); + int ret; + u8 reg; + + mutex_lock(&priv->lock); + + ret = hi8435_readb(priv, HI8435_PSEN_REG, ®); + if (ret < 0) { + mutex_unlock(&priv->lock); + return ret; + } + + reg &= ~BIT(chan->channel / 8); + if (mode) + reg |= BIT(chan->channel / 8); + + ret = hi8435_writeb(priv, HI8435_PSEN_REG, reg); + + mutex_unlock(&priv->lock); + + return ret; +} + +static const char * const hi8435_sensing_modes[] = { "GND-Open", + "Supply-Open" }; + +static const struct iio_enum hi8435_sensing_mode = { + .items = hi8435_sensing_modes, + .num_items = ARRAY_SIZE(hi8435_sensing_modes), + .get = hi8435_get_sensing_mode, + .set = hi8435_set_sensing_mode, +}; + +static const struct iio_chan_spec_ext_info hi8435_ext_info[] = { + IIO_ENUM("sensing_mode", IIO_SEPARATE, &hi8435_sensing_mode), + {}, +}; + +#define HI8435_VOLTAGE_CHANNEL(num) \ +{ \ + .type = IIO_VOLTAGE, \ + .indexed = 1, \ + .channel = num, \ + .event_spec = hi8435_events, \ + .num_event_specs = ARRAY_SIZE(hi8435_events), \ + .ext_info = hi8435_ext_info, \ +} + +static const struct iio_chan_spec hi8435_channels[] = { + HI8435_VOLTAGE_CHANNEL(0), + HI8435_VOLTAGE_CHANNEL(1), + HI8435_VOLTAGE_CHANNEL(2), + HI8435_VOLTAGE_CHANNEL(3), + HI8435_VOLTAGE_CHANNEL(4), + HI8435_VOLTAGE_CHANNEL(5), + HI8435_VOLTAGE_CHANNEL(6), + HI8435_VOLTAGE_CHANNEL(7), + HI8435_VOLTAGE_CHANNEL(8), + HI8435_VOLTAGE_CHANNEL(9), + HI8435_VOLTAGE_CHANNEL(10), + HI8435_VOLTAGE_CHANNEL(11), + HI8435_VOLTAGE_CHANNEL(12), + HI8435_VOLTAGE_CHANNEL(13), + HI8435_VOLTAGE_CHANNEL(14), + HI8435_VOLTAGE_CHANNEL(15), + HI8435_VOLTAGE_CHANNEL(16), + HI8435_VOLTAGE_CHANNEL(17), + HI8435_VOLTAGE_CHANNEL(18), + HI8435_VOLTAGE_CHANNEL(19), + HI8435_VOLTAGE_CHANNEL(20), + HI8435_VOLTAGE_CHANNEL(21), + HI8435_VOLTAGE_CHANNEL(22), + HI8435_VOLTAGE_CHANNEL(23), + HI8435_VOLTAGE_CHANNEL(24), + HI8435_VOLTAGE_CHANNEL(25), + HI8435_VOLTAGE_CHANNEL(26), + HI8435_VOLTAGE_CHANNEL(27), + HI8435_VOLTAGE_CHANNEL(28), + HI8435_VOLTAGE_CHANNEL(29), + HI8435_VOLTAGE_CHANNEL(30), + HI8435_VOLTAGE_CHANNEL(31), + IIO_CHAN_SOFT_TIMESTAMP(32), +}; + +static const struct iio_info hi8435_info = { + .driver_module = THIS_MODULE, + .read_event_config = &hi8435_read_event_config, + .write_event_config = hi8435_write_event_config, + .read_event_value = &hi8435_read_event_value, + .write_event_value = &hi8435_write_event_value, + .debugfs_reg_access = &hi8435_debugfs_reg_access, +}; + +static void hi8435_iio_push_event(struct iio_dev *idev, unsigned int val) +{ + struct hi8435_priv *priv = iio_priv(idev); + enum iio_event_direction dir; + unsigned int i; + unsigned int status = priv->event_prev_val ^ val; + + if (!status) + return; + + for_each_set_bit(i, &priv->event_scan_mask, 32) { + if (status & BIT(i)) { + dir = val & BIT(i) ? IIO_EV_DIR_RISING : + IIO_EV_DIR_FALLING; + iio_push_event(idev, + IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, i, + IIO_EV_TYPE_THRESH, dir), + iio_get_time_ns()); + } + } + + priv->event_prev_val = val; +} + +static irqreturn_t hi8435_trigger_handler(int irq, void *private) +{ + struct iio_poll_func *pf = private; + struct iio_dev *idev = pf->indio_dev; + struct hi8435_priv *priv = iio_priv(idev); + u32 val; + int ret; + + ret = hi8435_readl(priv, HI8435_SO31_0_REG, &val); + if (ret < 0) + goto err_read; + + hi8435_iio_push_event(idev, val); + +err_read: + iio_trigger_notify_done(idev->trig); + + return IRQ_HANDLED; +} + +static int hi8435_probe(struct spi_device *spi) +{ + struct iio_dev *idev; + struct hi8435_priv *priv; + struct gpio_desc *reset_gpio; + int ret; + + idev = devm_iio_device_alloc(&spi->dev, sizeof(*priv)); + if (!idev) + return -ENOMEM; + + priv = iio_priv(idev); + priv->spi = spi; + + reset_gpio = devm_gpiod_get(&spi->dev, NULL, GPIOD_OUT_LOW); + if (IS_ERR(reset_gpio)) { + /* chip s/w reset if h/w reset failed */ + hi8435_writeb(priv, HI8435_CTRL_REG, HI8435_CTRL_SRST); + hi8435_writeb(priv, HI8435_CTRL_REG, 0); + } else { + udelay(5); + gpiod_set_value(reset_gpio, 1); + } + + spi_set_drvdata(spi, idev); + mutex_init(&priv->lock); + + idev->dev.parent = &spi->dev; + idev->name = spi_get_device_id(spi)->name; + idev->modes = INDIO_DIRECT_MODE; + idev->info = &hi8435_info; + idev->channels = hi8435_channels; + idev->num_channels = ARRAY_SIZE(hi8435_channels); + + /* unmask all events */ + priv->event_scan_mask = ~(0); + /* + * There is a restriction in the chip - the hysteresis can not be odd. + * If the hysteresis is set to odd value then chip gets into lock state + * and not functional anymore. + * After chip reset the thresholds are in undefined state, so we need to + * initialize thresholds to some initial values and then prevent + * userspace setting odd hysteresis. + * + * Set threshold low voltage to 2V, threshold high voltage to 4V + * for both GND-Open and Supply-Open sensing modes. + */ + priv->threshold_lo[0] = priv->threshold_lo[1] = 2; + priv->threshold_hi[0] = priv->threshold_hi[1] = 4; + hi8435_writew(priv, HI8435_GOCENHYS_REG, 0x206); + hi8435_writew(priv, HI8435_SOCENHYS_REG, 0x206); + + ret = iio_triggered_event_setup(idev, NULL, hi8435_trigger_handler); + if (ret) + return ret; + + ret = iio_device_register(idev); + if (ret < 0) { + dev_err(&spi->dev, "unable to register device\n"); + goto unregister_triggered_event; + } + + return 0; + +unregister_triggered_event: + iio_triggered_event_cleanup(idev); + return ret; +} + +static int hi8435_remove(struct spi_device *spi) +{ + struct iio_dev *idev = spi_get_drvdata(spi); + + iio_device_unregister(idev); + iio_triggered_event_cleanup(idev); + + return 0; +} + +static const struct of_device_id hi8435_dt_ids[] = { + { .compatible = "holt,hi8435" }, + {}, +}; +MODULE_DEVICE_TABLE(of, hi8435_dt_ids); + +static const struct spi_device_id hi8435_id[] = { + { "hi8435", 0}, + { } +}; +MODULE_DEVICE_TABLE(spi, hi8435_id); + +static struct spi_driver hi8435_driver = { + .driver = { + .name = DRV_NAME, + .of_match_table = of_match_ptr(hi8435_dt_ids), + }, + .probe = hi8435_probe, + .remove = hi8435_remove, + .id_table = hi8435_id, +}; +module_spi_driver(hi8435_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Vladimir Barinov"); +MODULE_DESCRIPTION("HI-8435 threshold detector"); diff --git a/kernel/drivers/iio/adc/max1027.c b/kernel/drivers/iio/adc/max1027.c index 44bf815ad..41d495c60 100644 --- a/kernel/drivers/iio/adc/max1027.c +++ b/kernel/drivers/iio/adc/max1027.c @@ -508,7 +508,7 @@ static int max1027_remove(struct spi_device *spi) static struct spi_driver max1027_driver = { .driver = { .name = "max1027", - .owner = THIS_MODULE, + .of_match_table = of_match_ptr(max1027_adc_dt_ids), }, .probe = max1027_probe, .remove = max1027_remove, diff --git a/kernel/drivers/iio/adc/max1363.c b/kernel/drivers/iio/adc/max1363.c index 1b3b74be5..929508e52 100644 --- a/kernel/drivers/iio/adc/max1363.c +++ b/kernel/drivers/iio/adc/max1363.c @@ -1007,7 +1007,6 @@ static struct attribute *max1363_event_attributes[] = { static struct attribute_group max1363_event_attribute_group = { .attrs = max1363_event_attributes, - .name = "events", }; static int max1363_update_scan_mode(struct iio_dev *indio_dev, diff --git a/kernel/drivers/iio/adc/mcp320x.c b/kernel/drivers/iio/adc/mcp320x.c index 8d9c9b921..8569c8e1f 100644 --- a/kernel/drivers/iio/adc/mcp320x.c +++ b/kernel/drivers/iio/adc/mcp320x.c @@ -25,6 +25,7 @@ * http://ww1.microchip.com/downloads/en/DeviceDoc/21290D.pdf mcp3201 * http://ww1.microchip.com/downloads/en/DeviceDoc/21034D.pdf mcp3202 * http://ww1.microchip.com/downloads/en/DeviceDoc/21298c.pdf mcp3204/08 + * http://ww1.microchip.com/downloads/en/DeviceDoc/21700E.pdf mcp3301 * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -47,6 +48,7 @@ enum { mcp3202, mcp3204, mcp3208, + mcp3301, }; struct mcp320x_chip_info { @@ -76,6 +78,7 @@ static int mcp320x_channel_to_tx_data(int device_index, switch (device_index) { case mcp3001: case mcp3201: + case mcp3301: return 0; case mcp3002: case mcp3202: @@ -102,7 +105,7 @@ static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel, adc->tx_buf = mcp320x_channel_to_tx_data(device_index, channel, differential); - if (device_index != mcp3001 && device_index != mcp3201) { + if (device_index != mcp3001 && device_index != mcp3201 && device_index != mcp3301) { ret = spi_sync(adc->spi, &adc->msg); if (ret < 0) return ret; @@ -125,6 +128,8 @@ static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel, case mcp3204: case mcp3208: return (adc->rx_buf[0] << 4 | adc->rx_buf[1] >> 4); + case mcp3301: + return sign_extend32((adc->rx_buf[0] & 0x1f) << 8 | adc->rx_buf[1], 12); default: return -EINVAL; } @@ -274,6 +279,11 @@ static const struct mcp320x_chip_info mcp320x_chip_infos[] = { .num_channels = ARRAY_SIZE(mcp3208_channels), .resolution = 12 }, + [mcp3301] = { + .channels = mcp3201_channels, + .num_channels = ARRAY_SIZE(mcp3201_channels), + .resolution = 13 + }, }; static int mcp320x_probe(struct spi_device *spi) @@ -299,6 +309,8 @@ static int mcp320x_probe(struct spi_device *spi) indio_dev->channels = chip_info->channels; indio_dev->num_channels = chip_info->num_channels; + adc->chip_info = chip_info; + adc->transfer[0].tx_buf = &adc->tx_buf; adc->transfer[0].len = sizeof(adc->tx_buf); adc->transfer[1].rx_buf = adc->rx_buf; @@ -366,6 +378,9 @@ static const struct of_device_id mcp320x_dt_ids[] = { }, { .compatible = "mcp3208", .data = &mcp320x_chip_infos[mcp3208], + }, { + .compatible = "mcp3301", + .data = &mcp320x_chip_infos[mcp3301], }, { } }; @@ -381,6 +396,7 @@ static const struct spi_device_id mcp320x_id[] = { { "mcp3202", mcp3202 }, { "mcp3204", mcp3204 }, { "mcp3208", mcp3208 }, + { "mcp3301", mcp3301 }, { } }; MODULE_DEVICE_TABLE(spi, mcp320x_id); @@ -388,7 +404,7 @@ MODULE_DEVICE_TABLE(spi, mcp320x_id); static struct spi_driver mcp320x_driver = { .driver = { .name = "mcp320x", - .owner = THIS_MODULE, + .of_match_table = of_match_ptr(mcp320x_dt_ids), }, .probe = mcp320x_probe, .remove = mcp320x_remove, diff --git a/kernel/drivers/iio/adc/mcp3422.c b/kernel/drivers/iio/adc/mcp3422.c index b96c63647..355512200 100644 --- a/kernel/drivers/iio/adc/mcp3422.c +++ b/kernel/drivers/iio/adc/mcp3422.c @@ -404,7 +404,6 @@ MODULE_DEVICE_TABLE(of, mcp3422_of_match); static struct i2c_driver mcp3422_driver = { .driver = { .name = "mcp3422", - .owner = THIS_MODULE, .of_match_table = of_match_ptr(mcp3422_of_match), }, .probe = mcp3422_probe, diff --git a/kernel/drivers/iio/adc/qcom-spmi-vadc.c b/kernel/drivers/iio/adc/qcom-spmi-vadc.c index 0c4618b4d..c2babe50a 100644 --- a/kernel/drivers/iio/adc/qcom-spmi-vadc.c +++ b/kernel/drivers/iio/adc/qcom-spmi-vadc.c @@ -839,8 +839,10 @@ static int vadc_get_dt_data(struct vadc_priv *vadc, struct device_node *node) for_each_available_child_of_node(node, child) { ret = vadc_get_dt_channel_data(vadc->dev, &prop, child); - if (ret) + if (ret) { + of_node_put(child); return ret; + } vadc->chan_props[index] = prop; diff --git a/kernel/drivers/iio/adc/ti-adc081c.c b/kernel/drivers/iio/adc/ti-adc081c.c index b3a82b4d1..2c8374f86 100644 --- a/kernel/drivers/iio/adc/ti-adc081c.c +++ b/kernel/drivers/iio/adc/ti-adc081c.c @@ -140,7 +140,6 @@ MODULE_DEVICE_TABLE(of, adc081c_of_match); static struct i2c_driver adc081c_driver = { .driver = { .name = "adc081c", - .owner = THIS_MODULE, .of_match_table = of_match_ptr(adc081c_of_match), }, .probe = adc081c_probe, diff --git a/kernel/drivers/iio/adc/ti-adc128s052.c b/kernel/drivers/iio/adc/ti-adc128s052.c index 655cb564e..ff6f7f63c 100644 --- a/kernel/drivers/iio/adc/ti-adc128s052.c +++ b/kernel/drivers/iio/adc/ti-adc128s052.c @@ -1,9 +1,10 @@ /* * Copyright (C) 2014 Angelo Compagnucci * - * Driver for Texas Instruments' ADC128S052 ADC chip. - * Datasheet can be found here: + * Driver for Texas Instruments' ADC128S052 and ADC122S021 ADC chip. + * Datasheets can be found here: * http://www.ti.com/lit/ds/symlink/adc128s052.pdf + * http://www.ti.com/lit/ds/symlink/adc122s021.pdf * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -16,6 +17,11 @@ #include #include +struct adc128_configuration { + const struct iio_chan_spec *channels; + u8 num_channels; +}; + struct adc128 { struct spi_device *spi; @@ -92,7 +98,7 @@ static int adc128_read_raw(struct iio_dev *indio_dev, .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ } -static const struct iio_chan_spec adc128_channels[] = { +static const struct iio_chan_spec adc128s052_channels[] = { ADC128_VOLTAGE_CHANNEL(0), ADC128_VOLTAGE_CHANNEL(1), ADC128_VOLTAGE_CHANNEL(2), @@ -103,6 +109,16 @@ static const struct iio_chan_spec adc128_channels[] = { ADC128_VOLTAGE_CHANNEL(7), }; +static const struct iio_chan_spec adc122s021_channels[] = { + ADC128_VOLTAGE_CHANNEL(0), + ADC128_VOLTAGE_CHANNEL(1), +}; + +static const struct adc128_configuration adc128_config[] = { + { adc128s052_channels, ARRAY_SIZE(adc128s052_channels) }, + { adc122s021_channels, ARRAY_SIZE(adc122s021_channels) }, +}; + static const struct iio_info adc128_info = { .read_raw = adc128_read_raw, .driver_module = THIS_MODULE, @@ -112,6 +128,7 @@ static int adc128_probe(struct spi_device *spi) { struct iio_dev *indio_dev; struct adc128 *adc; + int config = spi_get_device_id(spi)->driver_data; int ret; indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc)); @@ -128,8 +145,8 @@ static int adc128_probe(struct spi_device *spi) indio_dev->modes = INDIO_DIRECT_MODE; indio_dev->info = &adc128_info; - indio_dev->channels = adc128_channels; - indio_dev->num_channels = ARRAY_SIZE(adc128_channels); + indio_dev->channels = adc128_config[config].channels; + indio_dev->num_channels = adc128_config[config].num_channels; adc->reg = devm_regulator_get(&spi->dev, "vref"); if (IS_ERR(adc->reg)) @@ -157,8 +174,16 @@ static int adc128_remove(struct spi_device *spi) return 0; } +static const struct of_device_id adc128_of_match[] = { + { .compatible = "ti,adc128s052", }, + { .compatible = "ti,adc122s021", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, adc128_of_match); + static const struct spi_device_id adc128_id[] = { - { "adc128s052", 0}, + { "adc128s052", 0}, /* index into adc128_config */ + { "adc122s021", 1}, { } }; MODULE_DEVICE_TABLE(spi, adc128_id); @@ -166,7 +191,7 @@ MODULE_DEVICE_TABLE(spi, adc128_id); static struct spi_driver adc128_driver = { .driver = { .name = "adc128s052", - .owner = THIS_MODULE, + .of_match_table = of_match_ptr(adc128_of_match), }, .probe = adc128_probe, .remove = adc128_remove, diff --git a/kernel/drivers/iio/adc/ti_am335x_adc.c b/kernel/drivers/iio/adc/ti_am335x_adc.c index a0e7161f0..c1e05532d 100644 --- a/kernel/drivers/iio/adc/ti_am335x_adc.c +++ b/kernel/drivers/iio/adc/ti_am335x_adc.c @@ -37,6 +37,7 @@ struct tiadc_device { u8 channel_step[8]; int buffer_en_ch_steps; u16 data[8]; + u32 open_delay[8], sample_delay[8], step_avg[8]; }; static unsigned int tiadc_readl(struct tiadc_device *adc, unsigned int reg) @@ -85,6 +86,7 @@ static u32 get_adc_step_bit(struct tiadc_device *adc_dev, int chan) static void tiadc_step_config(struct iio_dev *indio_dev) { struct tiadc_device *adc_dev = iio_priv(indio_dev); + struct device *dev = adc_dev->mfd_tscadc->dev; unsigned int stepconfig; int i, steps = 0; @@ -98,20 +100,47 @@ static void tiadc_step_config(struct iio_dev *indio_dev) * needs to be given to ADC to digitalize data. */ - if (iio_buffer_enabled(indio_dev)) - stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1 - | STEPCONFIG_MODE_SWCNT; - else - stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1; for (i = 0; i < adc_dev->channels; i++) { int chan; chan = adc_dev->channel_line[i]; + + if (adc_dev->step_avg[i] > STEPCONFIG_AVG_16) { + dev_warn(dev, "chan %d step_avg truncating to %d\n", + chan, STEPCONFIG_AVG_16); + adc_dev->step_avg[i] = STEPCONFIG_AVG_16; + } + + if (adc_dev->step_avg[i]) + stepconfig = + STEPCONFIG_AVG(ffs(adc_dev->step_avg[i]) - 1) | + STEPCONFIG_FIFO1; + else + stepconfig = STEPCONFIG_FIFO1; + + if (iio_buffer_enabled(indio_dev)) + stepconfig |= STEPCONFIG_MODE_SWCNT; + tiadc_writel(adc_dev, REG_STEPCONFIG(steps), stepconfig | STEPCONFIG_INP(chan)); + + if (adc_dev->open_delay[i] > STEPDELAY_OPEN_MASK) { + dev_warn(dev, "chan %d open delay truncating to 0x3FFFF\n", + chan); + adc_dev->open_delay[i] = STEPDELAY_OPEN_MASK; + } + + if (adc_dev->sample_delay[i] > 0xFF) { + dev_warn(dev, "chan %d sample delay truncating to 0xFF\n", + chan); + adc_dev->sample_delay[i] = 0xFF; + } + tiadc_writel(adc_dev, REG_STEPDELAY(steps), - STEPCONFIG_OPENDLY); + STEPDELAY_OPEN(adc_dev->open_delay[i]) | + STEPDELAY_SAMPLE(adc_dev->sample_delay[i])); + adc_dev->channel_step[i] = steps; steps++; } @@ -260,7 +289,7 @@ static int tiadc_iio_buffered_hardware_setup(struct iio_dev *indio_dev, goto error_kfifo_free; indio_dev->setup_ops = setup_ops; - indio_dev->modes |= INDIO_BUFFER_HARDWARE; + indio_dev->modes |= INDIO_BUFFER_SOFTWARE; return 0; @@ -395,16 +424,43 @@ static const struct iio_info tiadc_info = { .driver_module = THIS_MODULE, }; +static int tiadc_parse_dt(struct platform_device *pdev, + struct tiadc_device *adc_dev) +{ + struct device_node *node = pdev->dev.of_node; + struct property *prop; + const __be32 *cur; + int channels = 0; + u32 val; + + of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) { + adc_dev->channel_line[channels] = val; + + /* Set Default values for optional DT parameters */ + adc_dev->open_delay[channels] = STEPCONFIG_OPENDLY; + adc_dev->sample_delay[channels] = STEPCONFIG_SAMPLEDLY; + adc_dev->step_avg[channels] = 16; + + channels++; + } + + of_property_read_u32_array(node, "ti,chan-step-avg", + adc_dev->step_avg, channels); + of_property_read_u32_array(node, "ti,chan-step-opendelay", + adc_dev->open_delay, channels); + of_property_read_u32_array(node, "ti,chan-step-sampledelay", + adc_dev->sample_delay, channels); + + adc_dev->channels = channels; + return 0; +} + static int tiadc_probe(struct platform_device *pdev) { struct iio_dev *indio_dev; struct tiadc_device *adc_dev; struct device_node *node = pdev->dev.of_node; - struct property *prop; - const __be32 *cur; int err; - u32 val; - int channels = 0; if (!node) { dev_err(&pdev->dev, "Could not find valid DT data.\n"); @@ -420,12 +476,7 @@ static int tiadc_probe(struct platform_device *pdev) adc_dev = iio_priv(indio_dev); adc_dev->mfd_tscadc = ti_tscadc_dev_get(pdev); - - of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) { - adc_dev->channel_line[channels] = val; - channels++; - } - adc_dev->channels = channels; + tiadc_parse_dt(pdev, adc_dev); indio_dev->dev.parent = &pdev->dev; indio_dev->name = dev_name(&pdev->dev); diff --git a/kernel/drivers/iio/adc/twl4030-madc.c b/kernel/drivers/iio/adc/twl4030-madc.c index 4caecbea4..0c74869a5 100644 --- a/kernel/drivers/iio/adc/twl4030-madc.c +++ b/kernel/drivers/iio/adc/twl4030-madc.c @@ -45,13 +45,18 @@ #include #include #include +#include #include +#define TWL4030_USB_SEL_MADC_MCPC (1<<3) +#define TWL4030_USB_CARKIT_ANA_CTRL 0xBB + /** * struct twl4030_madc_data - a container for madc info * @dev: Pointer to device structure for madc * @lock: Mutex protecting this data structure + * @regulator: Pointer to bias regulator for madc * @requests: Array of request struct corresponding to SW1, SW2 and RT * @use_second_irq: IRQ selection (main or co-processor) * @imr: Interrupt mask register of MADC @@ -60,6 +65,7 @@ struct twl4030_madc_data { struct device *dev; struct mutex lock; /* mutex protecting this data structure */ + struct regulator *usb3v1; struct twl4030_madc_request requests[TWL4030_MADC_NUM_METHODS]; bool use_second_irq; u8 imr; @@ -235,7 +241,7 @@ static int twl4030battery_temperature(int raw_volt) if (ret < 0) return ret; - curr = ((val & TWL4030_BCI_ITHEN) + 1) * 10; + curr = ((val & TWL4030_BCI_ITHSENS) + 1) * 10; /* Getting and calculating the thermistor resistance in ohms */ res = volt * 1000 / curr; /* calculating temperature */ @@ -662,10 +668,8 @@ EXPORT_SYMBOL_GPL(twl4030_get_madc_conversion); * * @madc: pointer to twl4030_madc_data struct * @chan: can be one of the two values: - * TWL4030_BCI_ITHEN - * Enables bias current for main battery type reading - * TWL4030_BCI_TYPEN - * Enables bias current for main battery temperature sensing + * 0 - Enables bias current for main battery type reading + * 1 - Enables bias current for main battery temperature sensing * @on: enable or disable chan. * * Function to enable or disable bias current for @@ -843,6 +847,32 @@ static int twl4030_madc_probe(struct platform_device *pdev) } twl4030_madc = madc; + /* Configure MADC[3:6] */ + ret = twl_i2c_read_u8(TWL_MODULE_USB, ®val, + TWL4030_USB_CARKIT_ANA_CTRL); + if (ret) { + dev_err(&pdev->dev, "unable to read reg CARKIT_ANA_CTRL 0x%X\n", + TWL4030_USB_CARKIT_ANA_CTRL); + goto err_i2c; + } + regval |= TWL4030_USB_SEL_MADC_MCPC; + ret = twl_i2c_write_u8(TWL_MODULE_USB, regval, + TWL4030_USB_CARKIT_ANA_CTRL); + if (ret) { + dev_err(&pdev->dev, "unable to write reg CARKIT_ANA_CTRL 0x%X\n", + TWL4030_USB_CARKIT_ANA_CTRL); + goto err_i2c; + } + + /* Enable 3v1 bias regulator for MADC[3:6] */ + madc->usb3v1 = devm_regulator_get(madc->dev, "vusb3v1"); + if (IS_ERR(madc->usb3v1)) + return -ENODEV; + + ret = regulator_enable(madc->usb3v1); + if (ret) + dev_err(madc->dev, "could not enable 3v1 bias regulator\n"); + ret = iio_device_register(iio_dev); if (ret) { dev_err(&pdev->dev, "could not register iio device\n"); @@ -868,6 +898,8 @@ static int twl4030_madc_remove(struct platform_device *pdev) twl4030_madc_set_current_generator(madc, 0, 0); twl4030_madc_set_power(madc, 0); + regulator_disable(madc->usb3v1); + return 0; } diff --git a/kernel/drivers/iio/adc/twl6030-gpadc.c b/kernel/drivers/iio/adc/twl6030-gpadc.c index df12c57e6..becbb0aef 100644 --- a/kernel/drivers/iio/adc/twl6030-gpadc.c +++ b/kernel/drivers/iio/adc/twl6030-gpadc.c @@ -875,6 +875,7 @@ static const struct of_device_id of_twl6030_match_tbl[] = { }, { /* end */ } }; +MODULE_DEVICE_TABLE(of, of_twl6030_match_tbl); static int twl6030_gpadc_probe(struct platform_device *pdev) { diff --git a/kernel/drivers/iio/adc/vf610_adc.c b/kernel/drivers/iio/adc/vf610_adc.c index 56292ae45..b10f629cc 100644 --- a/kernel/drivers/iio/adc/vf610_adc.c +++ b/kernel/drivers/iio/adc/vf610_adc.c @@ -34,8 +34,11 @@ #include #include +#include #include -#include +#include +#include +#include /* This will be the driver name the kernel reports */ #define DRIVER_NAME "vf610-adc" @@ -68,6 +71,9 @@ #define VF610_ADC_CLK_DIV8 0x60 #define VF610_ADC_CLK_MASK 0x60 #define VF610_ADC_ADLSMP_LONG 0x10 +#define VF610_ADC_ADSTS_SHORT 0x100 +#define VF610_ADC_ADSTS_NORMAL 0x200 +#define VF610_ADC_ADSTS_LONG 0x300 #define VF610_ADC_ADSTS_MASK 0x300 #define VF610_ADC_ADLPC_EN 0x80 #define VF610_ADC_ADHSC_EN 0x400 @@ -98,6 +104,15 @@ #define VF610_ADC_CALF 0x2 #define VF610_ADC_TIMEOUT msecs_to_jiffies(100) +#define DEFAULT_SAMPLE_TIME 1000 + +/* V at 25°C of 696 mV */ +#define VF610_VTEMP25_3V0 950 +/* V at 25°C of 699 mV */ +#define VF610_VTEMP25_3V3 867 +/* Typical sensor slope coefficient at all temperatures */ +#define VF610_TEMP_SLOPE_COEFF 1840 + enum clk_sel { VF610_ADCIOC_BUSCLK_SET, VF610_ADCIOC_ALTCLK_SET, @@ -118,15 +133,34 @@ enum average_sel { VF610_ADC_SAMPLE_32, }; +enum conversion_mode_sel { + VF610_ADC_CONV_NORMAL, + VF610_ADC_CONV_HIGH_SPEED, + VF610_ADC_CONV_LOW_POWER, +}; + +enum lst_adder_sel { + VF610_ADCK_CYCLES_3, + VF610_ADCK_CYCLES_5, + VF610_ADCK_CYCLES_7, + VF610_ADCK_CYCLES_9, + VF610_ADCK_CYCLES_13, + VF610_ADCK_CYCLES_17, + VF610_ADCK_CYCLES_21, + VF610_ADCK_CYCLES_25, +}; + struct vf610_adc_feature { enum clk_sel clk_sel; enum vol_ref vol_ref; + enum conversion_mode_sel conv_mode; int clk_div; int sample_rate; int res_mode; + u32 lst_adder_index; + u32 default_sample_time; - bool lpm; bool calibration; bool ovwren; }; @@ -139,55 +173,51 @@ struct vf610_adc { u32 vref_uv; u32 value; struct regulator *vref; + + u32 max_adck_rate[3]; struct vf610_adc_feature adc_feature; u32 sample_freq_avail[5]; struct completion completion; + u16 buffer[8]; }; static const u32 vf610_hw_avgs[] = { 1, 4, 8, 16, 32 }; - -#define VF610_ADC_CHAN(_idx, _chan_type) { \ - .type = (_chan_type), \ - .indexed = 1, \ - .channel = (_idx), \ - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ - BIT(IIO_CHAN_INFO_SAMP_FREQ), \ -} - -#define VF610_ADC_TEMPERATURE_CHAN(_idx, _chan_type) { \ - .type = (_chan_type), \ - .channel = (_idx), \ - .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \ -} - -static const struct iio_chan_spec vf610_adc_iio_channels[] = { - VF610_ADC_CHAN(0, IIO_VOLTAGE), - VF610_ADC_CHAN(1, IIO_VOLTAGE), - VF610_ADC_CHAN(2, IIO_VOLTAGE), - VF610_ADC_CHAN(3, IIO_VOLTAGE), - VF610_ADC_CHAN(4, IIO_VOLTAGE), - VF610_ADC_CHAN(5, IIO_VOLTAGE), - VF610_ADC_CHAN(6, IIO_VOLTAGE), - VF610_ADC_CHAN(7, IIO_VOLTAGE), - VF610_ADC_CHAN(8, IIO_VOLTAGE), - VF610_ADC_CHAN(9, IIO_VOLTAGE), - VF610_ADC_CHAN(10, IIO_VOLTAGE), - VF610_ADC_CHAN(11, IIO_VOLTAGE), - VF610_ADC_CHAN(12, IIO_VOLTAGE), - VF610_ADC_CHAN(13, IIO_VOLTAGE), - VF610_ADC_CHAN(14, IIO_VOLTAGE), - VF610_ADC_CHAN(15, IIO_VOLTAGE), - VF610_ADC_TEMPERATURE_CHAN(26, IIO_TEMP), - /* sentinel */ -}; +static const u32 vf610_lst_adder[] = { 3, 5, 7, 9, 13, 17, 21, 25 }; static inline void vf610_adc_calculate_rates(struct vf610_adc *info) { + struct vf610_adc_feature *adc_feature = &info->adc_feature; unsigned long adck_rate, ipg_rate = clk_get_rate(info->clk); - int i; + u32 adck_period, lst_addr_min; + int divisor, i; + + adck_rate = info->max_adck_rate[adc_feature->conv_mode]; + + if (adck_rate) { + /* calculate clk divider which is within specification */ + divisor = ipg_rate / adck_rate; + adc_feature->clk_div = 1 << fls(divisor + 1); + } else { + /* fall-back value using a safe divisor */ + adc_feature->clk_div = 8; + } + + adck_rate = ipg_rate / adc_feature->clk_div; + + /* + * Determine the long sample time adder value to be used based + * on the default minimum sample time provided. + */ + adck_period = NSEC_PER_SEC / adck_rate; + lst_addr_min = adc_feature->default_sample_time / adck_period; + for (i = 0; i < ARRAY_SIZE(vf610_lst_adder); i++) { + if (vf610_lst_adder[i] > lst_addr_min) { + adc_feature->lst_adder_index = i; + break; + } + } /* * Calculate ADC sample frequencies @@ -198,12 +228,12 @@ static inline void vf610_adc_calculate_rates(struct vf610_adc *info) * SFCAdder: fixed to 6 ADCK cycles * AverageNum: 1, 4, 8, 16, 32 samples for hardware average. * BCT (Base Conversion Time): fixed to 25 ADCK cycles for 12 bit mode - * LSTAdder(Long Sample Time): fixed to 3 ADCK cycles + * LSTAdder(Long Sample Time): 3, 5, 7, 9, 13, 17, 21, 25 ADCK cycles */ - adck_rate = ipg_rate / info->adc_feature.clk_div; for (i = 0; i < ARRAY_SIZE(vf610_hw_avgs); i++) info->sample_freq_avail[i] = - adck_rate / (6 + vf610_hw_avgs[i] * (25 + 3)); + adck_rate / (6 + vf610_hw_avgs[i] * + (25 + vf610_lst_adder[adc_feature->lst_adder_index])); } static inline void vf610_adc_cfg_init(struct vf610_adc *info) @@ -219,10 +249,8 @@ static inline void vf610_adc_cfg_init(struct vf610_adc *info) adc_feature->res_mode = 12; adc_feature->sample_rate = 1; - adc_feature->lpm = true; - /* Use a save ADCK which is below 20MHz on all devices */ - adc_feature->clk_div = 8; + adc_feature->conv_mode = VF610_ADC_CONV_LOW_POWER; vf610_adc_calculate_rates(info); } @@ -304,10 +332,12 @@ static void vf610_adc_cfg_set(struct vf610_adc *info) cfg_data = readl(info->regs + VF610_REG_ADC_CFG); cfg_data &= ~VF610_ADC_ADLPC_EN; - if (adc_feature->lpm) + if (adc_feature->conv_mode == VF610_ADC_CONV_LOW_POWER) cfg_data |= VF610_ADC_ADLPC_EN; cfg_data &= ~VF610_ADC_ADHSC_EN; + if (adc_feature->conv_mode == VF610_ADC_CONV_HIGH_SPEED) + cfg_data |= VF610_ADC_ADHSC_EN; writel(cfg_data, info->regs + VF610_REG_ADC_CFG); } @@ -363,8 +393,40 @@ static void vf610_adc_sample_set(struct vf610_adc *info) break; } - /* Use the short sample mode */ - cfg_data &= ~(VF610_ADC_ADLSMP_LONG | VF610_ADC_ADSTS_MASK); + /* + * Set ADLSMP and ADSTS based on the Long Sample Time Adder value + * determined. + */ + switch (adc_feature->lst_adder_index) { + case VF610_ADCK_CYCLES_3: + break; + case VF610_ADCK_CYCLES_5: + cfg_data |= VF610_ADC_ADSTS_SHORT; + break; + case VF610_ADCK_CYCLES_7: + cfg_data |= VF610_ADC_ADSTS_NORMAL; + break; + case VF610_ADCK_CYCLES_9: + cfg_data |= VF610_ADC_ADSTS_LONG; + break; + case VF610_ADCK_CYCLES_13: + cfg_data |= VF610_ADC_ADLSMP_LONG; + break; + case VF610_ADCK_CYCLES_17: + cfg_data |= VF610_ADC_ADLSMP_LONG; + cfg_data |= VF610_ADC_ADSTS_SHORT; + break; + case VF610_ADCK_CYCLES_21: + cfg_data |= VF610_ADC_ADLSMP_LONG; + cfg_data |= VF610_ADC_ADSTS_NORMAL; + break; + case VF610_ADCK_CYCLES_25: + cfg_data |= VF610_ADC_ADLSMP_LONG; + cfg_data |= VF610_ADC_ADSTS_NORMAL; + break; + default: + dev_err(info->dev, "error in sample time select\n"); + } /* update hardware average selection */ cfg_data &= ~VF610_ADC_AVGS_MASK; @@ -409,6 +471,94 @@ static void vf610_adc_hw_init(struct vf610_adc *info) vf610_adc_cfg_set(info); } +static int vf610_set_conversion_mode(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + unsigned int mode) +{ + struct vf610_adc *info = iio_priv(indio_dev); + + mutex_lock(&indio_dev->mlock); + info->adc_feature.conv_mode = mode; + vf610_adc_calculate_rates(info); + vf610_adc_hw_init(info); + mutex_unlock(&indio_dev->mlock); + + return 0; +} + +static int vf610_get_conversion_mode(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan) +{ + struct vf610_adc *info = iio_priv(indio_dev); + + return info->adc_feature.conv_mode; +} + +static const char * const vf610_conv_modes[] = { "normal", "high-speed", + "low-power" }; + +static const struct iio_enum vf610_conversion_mode = { + .items = vf610_conv_modes, + .num_items = ARRAY_SIZE(vf610_conv_modes), + .get = vf610_get_conversion_mode, + .set = vf610_set_conversion_mode, +}; + +static const struct iio_chan_spec_ext_info vf610_ext_info[] = { + IIO_ENUM("conversion_mode", IIO_SHARED_BY_DIR, &vf610_conversion_mode), + {}, +}; + +#define VF610_ADC_CHAN(_idx, _chan_type) { \ + .type = (_chan_type), \ + .indexed = 1, \ + .channel = (_idx), \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ + BIT(IIO_CHAN_INFO_SAMP_FREQ), \ + .ext_info = vf610_ext_info, \ + .scan_index = (_idx), \ + .scan_type = { \ + .sign = 'u', \ + .realbits = 12, \ + .storagebits = 16, \ + }, \ +} + +#define VF610_ADC_TEMPERATURE_CHAN(_idx, _chan_type) { \ + .type = (_chan_type), \ + .channel = (_idx), \ + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \ + .scan_index = (_idx), \ + .scan_type = { \ + .sign = 'u', \ + .realbits = 12, \ + .storagebits = 16, \ + }, \ +} + +static const struct iio_chan_spec vf610_adc_iio_channels[] = { + VF610_ADC_CHAN(0, IIO_VOLTAGE), + VF610_ADC_CHAN(1, IIO_VOLTAGE), + VF610_ADC_CHAN(2, IIO_VOLTAGE), + VF610_ADC_CHAN(3, IIO_VOLTAGE), + VF610_ADC_CHAN(4, IIO_VOLTAGE), + VF610_ADC_CHAN(5, IIO_VOLTAGE), + VF610_ADC_CHAN(6, IIO_VOLTAGE), + VF610_ADC_CHAN(7, IIO_VOLTAGE), + VF610_ADC_CHAN(8, IIO_VOLTAGE), + VF610_ADC_CHAN(9, IIO_VOLTAGE), + VF610_ADC_CHAN(10, IIO_VOLTAGE), + VF610_ADC_CHAN(11, IIO_VOLTAGE), + VF610_ADC_CHAN(12, IIO_VOLTAGE), + VF610_ADC_CHAN(13, IIO_VOLTAGE), + VF610_ADC_CHAN(14, IIO_VOLTAGE), + VF610_ADC_CHAN(15, IIO_VOLTAGE), + VF610_ADC_TEMPERATURE_CHAN(26, IIO_TEMP), + IIO_CHAN_SOFT_TIMESTAMP(32), + /* sentinel */ +}; + static int vf610_adc_read_data(struct vf610_adc *info) { int result; @@ -434,13 +584,20 @@ static int vf610_adc_read_data(struct vf610_adc *info) static irqreturn_t vf610_adc_isr(int irq, void *dev_id) { - struct vf610_adc *info = (struct vf610_adc *)dev_id; + struct iio_dev *indio_dev = (struct iio_dev *)dev_id; + struct vf610_adc *info = iio_priv(indio_dev); int coco; coco = readl(info->regs + VF610_REG_ADC_HS); if (coco & VF610_ADC_HS_COCO0) { info->value = vf610_adc_read_data(info); - complete(&info->completion); + if (iio_buffer_enabled(indio_dev)) { + info->buffer[0] = info->value; + iio_push_to_buffers_with_timestamp(indio_dev, + info->buffer, iio_get_time_ns()); + iio_trigger_notify_done(indio_dev->trig); + } else + complete(&info->completion); } return IRQ_HANDLED; @@ -488,8 +645,12 @@ static int vf610_read_raw(struct iio_dev *indio_dev, case IIO_CHAN_INFO_RAW: case IIO_CHAN_INFO_PROCESSED: mutex_lock(&indio_dev->mlock); - reinit_completion(&info->completion); + if (iio_buffer_enabled(indio_dev)) { + mutex_unlock(&indio_dev->mlock); + return -EBUSY; + } + reinit_completion(&info->completion); hc_cfg = VF610_ADC_ADCHC(chan->channel); hc_cfg |= VF610_ADC_AIEN; writel(hc_cfg, info->regs + VF610_REG_ADC_HC0); @@ -510,11 +671,13 @@ static int vf610_read_raw(struct iio_dev *indio_dev, break; case IIO_TEMP: /* - * Calculate in degree Celsius times 1000 - * Using sensor slope of 1.84 mV/°C and - * V at 25°C of 696 mV - */ - *val = 25000 - ((int)info->value - 864) * 1000000 / 1840; + * Calculate in degree Celsius times 1000 + * Using the typical sensor slope of 1.84 mV/°C + * and VREFH_ADC at 3.3V, V at 25°C of 699 mV + */ + *val = 25000 - ((int)info->value - VF610_VTEMP25_3V3) * + 1000000 / VF610_TEMP_SLOPE_COEFF; + break; default: mutex_unlock(&indio_dev->mlock); @@ -569,6 +732,56 @@ static int vf610_write_raw(struct iio_dev *indio_dev, return -EINVAL; } +static int vf610_adc_buffer_postenable(struct iio_dev *indio_dev) +{ + struct vf610_adc *info = iio_priv(indio_dev); + unsigned int channel; + int ret; + int val; + + ret = iio_triggered_buffer_postenable(indio_dev); + if (ret) + return ret; + + val = readl(info->regs + VF610_REG_ADC_GC); + val |= VF610_ADC_ADCON; + writel(val, info->regs + VF610_REG_ADC_GC); + + channel = find_first_bit(indio_dev->active_scan_mask, + indio_dev->masklength); + + val = VF610_ADC_ADCHC(channel); + val |= VF610_ADC_AIEN; + + writel(val, info->regs + VF610_REG_ADC_HC0); + + return 0; +} + +static int vf610_adc_buffer_predisable(struct iio_dev *indio_dev) +{ + struct vf610_adc *info = iio_priv(indio_dev); + unsigned int hc_cfg = 0; + int val; + + val = readl(info->regs + VF610_REG_ADC_GC); + val &= ~VF610_ADC_ADCON; + writel(val, info->regs + VF610_REG_ADC_GC); + + hc_cfg |= VF610_ADC_CONV_DISABLE; + hc_cfg &= ~VF610_ADC_AIEN; + + writel(hc_cfg, info->regs + VF610_REG_ADC_HC0); + + return iio_triggered_buffer_predisable(indio_dev); +} + +static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = { + .postenable = &vf610_adc_buffer_postenable, + .predisable = &vf610_adc_buffer_predisable, + .validate_scan_mask = &iio_validate_scan_mask_onehot, +}; + static int vf610_adc_reg_access(struct iio_dev *indio_dev, unsigned reg, unsigned writeval, unsigned *readval) @@ -576,7 +789,7 @@ static int vf610_adc_reg_access(struct iio_dev *indio_dev, struct vf610_adc *info = iio_priv(indio_dev); if ((readval == NULL) || - (!(reg % 4) || (reg > VF610_REG_ADC_PCTL))) + ((reg % 4) || (reg > VF610_REG_ADC_PCTL))) return -EINVAL; *readval = readl(info->regs + reg); @@ -628,7 +841,7 @@ static int vf610_adc_probe(struct platform_device *pdev) ret = devm_request_irq(info->dev, irq, vf610_adc_isr, 0, - dev_name(&pdev->dev), info); + dev_name(&pdev->dev), indio_dev); if (ret < 0) { dev_err(&pdev->dev, "failed requesting irq, irq = %d\n", irq); return ret; @@ -651,6 +864,14 @@ static int vf610_adc_probe(struct platform_device *pdev) info->vref_uv = regulator_get_voltage(info->vref); + of_property_read_u32_array(pdev->dev.of_node, "fsl,adck-max-frequency", + info->max_adck_rate, 3); + + ret = of_property_read_u32(pdev->dev.of_node, "min-sample-time", + &info->adc_feature.default_sample_time); + if (ret) + info->adc_feature.default_sample_time = DEFAULT_SAMPLE_TIME; + platform_set_drvdata(pdev, indio_dev); init_completion(&info->completion); @@ -673,15 +894,23 @@ static int vf610_adc_probe(struct platform_device *pdev) vf610_adc_cfg_init(info); vf610_adc_hw_init(info); + ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time, + NULL, &iio_triggered_buffer_setup_ops); + if (ret < 0) { + dev_err(&pdev->dev, "Couldn't initialise the buffer\n"); + goto error_iio_device_register; + } + ret = iio_device_register(indio_dev); if (ret) { dev_err(&pdev->dev, "Couldn't register the device.\n"); - goto error_iio_device_register; + goto error_adc_buffer_init; } return 0; - +error_adc_buffer_init: + iio_triggered_buffer_cleanup(indio_dev); error_iio_device_register: clk_disable_unprepare(info->clk); error_adc_clk_enable: @@ -696,6 +925,7 @@ static int vf610_adc_remove(struct platform_device *pdev) struct vf610_adc *info = iio_priv(indio_dev); iio_device_unregister(indio_dev); + iio_triggered_buffer_cleanup(indio_dev); regulator_disable(info->vref); clk_disable_unprepare(info->clk); diff --git a/kernel/drivers/iio/adc/xilinx-xadc-core.c b/kernel/drivers/iio/adc/xilinx-xadc-core.c index ce93bd8e3..02e636a1c 100644 --- a/kernel/drivers/iio/adc/xilinx-xadc-core.c +++ b/kernel/drivers/iio/adc/xilinx-xadc-core.c @@ -273,33 +273,13 @@ static void xadc_zynq_unmask_worker(struct work_struct *work) schedule_delayed_work(&xadc->zynq_unmask_work, msecs_to_jiffies(XADC_ZYNQ_UNMASK_TIMEOUT)); } -} - -static irqreturn_t xadc_zynq_threaded_interrupt_handler(int irq, void *devid) -{ - struct iio_dev *indio_dev = devid; - struct xadc *xadc = iio_priv(indio_dev); - unsigned int alarm; - - spin_lock_irq(&xadc->lock); - alarm = xadc->zynq_alarm; - xadc->zynq_alarm = 0; - spin_unlock_irq(&xadc->lock); - - xadc_handle_events(indio_dev, xadc_zynq_transform_alarm(alarm)); - /* unmask the required interrupts in timer. */ - schedule_delayed_work(&xadc->zynq_unmask_work, - msecs_to_jiffies(XADC_ZYNQ_UNMASK_TIMEOUT)); - - return IRQ_HANDLED; } static irqreturn_t xadc_zynq_interrupt_handler(int irq, void *devid) { struct iio_dev *indio_dev = devid; struct xadc *xadc = iio_priv(indio_dev); - irqreturn_t ret = IRQ_HANDLED; uint32_t status; xadc_read_reg(xadc, XADC_ZYNQ_REG_INTSTS, &status); @@ -321,18 +301,23 @@ static irqreturn_t xadc_zynq_interrupt_handler(int irq, void *devid) status &= XADC_ZYNQ_INT_ALARM_MASK; if (status) { - xadc->zynq_alarm |= status; xadc->zynq_masked_alarm |= status; /* * mask the current event interrupt, * unmask it when the interrupt is no more active. */ xadc_zynq_update_intmsk(xadc, 0, 0); - ret = IRQ_WAKE_THREAD; + + xadc_handle_events(indio_dev, + xadc_zynq_transform_alarm(status)); + + /* unmask the required interrupts in timer. */ + schedule_delayed_work(&xadc->zynq_unmask_work, + msecs_to_jiffies(XADC_ZYNQ_UNMASK_TIMEOUT)); } spin_unlock(&xadc->lock); - return ret; + return IRQ_HANDLED; } #define XADC_ZYNQ_TCK_RATE_MAX 50000000 @@ -437,7 +422,6 @@ static const struct xadc_ops xadc_zynq_ops = { .setup = xadc_zynq_setup, .get_dclk_rate = xadc_zynq_get_dclk_rate, .interrupt_handler = xadc_zynq_interrupt_handler, - .threaded_interrupt_handler = xadc_zynq_threaded_interrupt_handler, .update_alarm = xadc_zynq_update_alarm, }; @@ -857,6 +841,7 @@ static int xadc_read_raw(struct iio_dev *indio_dev, case XADC_REG_VCCINT: case XADC_REG_VCCAUX: case XADC_REG_VREFP: + case XADC_REG_VREFN: case XADC_REG_VCCBRAM: case XADC_REG_VCCPINT: case XADC_REG_VCCPAUX: @@ -1225,9 +1210,8 @@ static int xadc_probe(struct platform_device *pdev) if (ret) goto err_free_samplerate_trigger; - ret = request_threaded_irq(irq, xadc->ops->interrupt_handler, - xadc->ops->threaded_interrupt_handler, - 0, dev_name(&pdev->dev), indio_dev); + ret = request_irq(irq, xadc->ops->interrupt_handler, 0, + dev_name(&pdev->dev), indio_dev); if (ret) goto err_clk_disable_unprepare; diff --git a/kernel/drivers/iio/adc/xilinx-xadc.h b/kernel/drivers/iio/adc/xilinx-xadc.h index 54adc5087..f6f081965 100644 --- a/kernel/drivers/iio/adc/xilinx-xadc.h +++ b/kernel/drivers/iio/adc/xilinx-xadc.h @@ -60,7 +60,6 @@ struct xadc { enum xadc_external_mux_mode external_mux_mode; - unsigned int zynq_alarm; unsigned int zynq_masked_alarm; unsigned int zynq_intmask; struct delayed_work zynq_unmask_work; @@ -79,7 +78,6 @@ struct xadc_ops { void (*update_alarm)(struct xadc *, unsigned int); unsigned long (*get_dclk_rate)(struct xadc *); irqreturn_t (*interrupt_handler)(int, void *); - irqreturn_t (*threaded_interrupt_handler)(int, void *); unsigned int flags; }; -- cgit 1.2.3-korg