From 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 Mon Sep 17 00:00:00 2001 From: Yunhong Jiang Date: Tue, 4 Aug 2015 12:17:53 -0700 Subject: Add the rt linux 4.1.3-rt3 as base Import the rt linux 4.1.3-rt3 as OPNFV kvm base. It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and the base is: commit 0917f823c59692d751951bf5ea699a2d1e2f26a2 Author: Sebastian Andrzej Siewior Date: Sat Jul 25 12:13:34 2015 +0200 Prepare v4.1.3-rt3 Signed-off-by: Sebastian Andrzej Siewior We lose all the git history this way and it's not good. We should apply another opnfv project repo in future. Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423 Signed-off-by: Yunhong Jiang --- kernel/arch/arm/mach-clps711x/Kconfig | 38 +++ kernel/arch/arm/mach-clps711x/Makefile | 13 + kernel/arch/arm/mach-clps711x/Makefile.boot | 5 + kernel/arch/arm/mach-clps711x/board-autcpu12.c | 275 +++++++++++++++ kernel/arch/arm/mach-clps711x/board-cdb89712.c | 147 ++++++++ kernel/arch/arm/mach-clps711x/board-clep7312.c | 45 +++ kernel/arch/arm/mach-clps711x/board-edb7211.c | 188 +++++++++++ kernel/arch/arm/mach-clps711x/board-p720t.c | 373 +++++++++++++++++++++ kernel/arch/arm/mach-clps711x/common.c | 65 ++++ kernel/arch/arm/mach-clps711x/common.h | 23 ++ kernel/arch/arm/mach-clps711x/devices.c | 149 ++++++++ kernel/arch/arm/mach-clps711x/devices.h | 12 + .../arch/arm/mach-clps711x/include/mach/clps711x.h | 204 +++++++++++ .../arch/arm/mach-clps711x/include/mach/hardware.h | 53 +++ .../arm/mach-clps711x/include/mach/uncompress.h | 55 +++ 15 files changed, 1645 insertions(+) create mode 100644 kernel/arch/arm/mach-clps711x/Kconfig create mode 100644 kernel/arch/arm/mach-clps711x/Makefile create mode 100644 kernel/arch/arm/mach-clps711x/Makefile.boot create mode 100644 kernel/arch/arm/mach-clps711x/board-autcpu12.c create mode 100644 kernel/arch/arm/mach-clps711x/board-cdb89712.c create mode 100644 kernel/arch/arm/mach-clps711x/board-clep7312.c create mode 100644 kernel/arch/arm/mach-clps711x/board-edb7211.c create mode 100644 kernel/arch/arm/mach-clps711x/board-p720t.c create mode 100644 kernel/arch/arm/mach-clps711x/common.c create mode 100644 kernel/arch/arm/mach-clps711x/common.h create mode 100644 kernel/arch/arm/mach-clps711x/devices.c create mode 100644 kernel/arch/arm/mach-clps711x/devices.h create mode 100644 kernel/arch/arm/mach-clps711x/include/mach/clps711x.h create mode 100644 kernel/arch/arm/mach-clps711x/include/mach/hardware.h create mode 100644 kernel/arch/arm/mach-clps711x/include/mach/uncompress.h (limited to 'kernel/arch/arm/mach-clps711x') diff --git a/kernel/arch/arm/mach-clps711x/Kconfig b/kernel/arch/arm/mach-clps711x/Kconfig new file mode 100644 index 000000000..f711498c1 --- /dev/null +++ b/kernel/arch/arm/mach-clps711x/Kconfig @@ -0,0 +1,38 @@ +if ARCH_CLPS711X + +menu "CLPS711X/EP721X/EP731X Implementations" + +config ARCH_AUTCPU12 + bool "AUTCPU12" + help + Say Y if you intend to run the kernel on the autronix autcpu12 + board. This board is based on a Cirrus Logic CS89712. + +config ARCH_CDB89712 + bool "CDB89712" + help + This is an evaluation board from Cirrus for the CS89712 processor. + The board includes 2 serial ports, Ethernet, IRDA, and expansion + headers. It comes with 16 MB SDRAM and 8 MB flash ROM. + +config ARCH_CLEP7312 + bool "CLEP7312" + help + Boards based on the Cirrus Logic 7212/7312 chips. + +config ARCH_EDB7211 + bool "EDB7211" + select ARCH_HAS_HOLES_MEMORYMODEL + help + Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211 + evaluation board. + +config ARCH_P720T + bool "P720T" + help + Say Y here if you intend to run this kernel on the ARM Prospector + 720T. + +endmenu + +endif diff --git a/kernel/arch/arm/mach-clps711x/Makefile b/kernel/arch/arm/mach-clps711x/Makefile new file mode 100644 index 000000000..f04151efd --- /dev/null +++ b/kernel/arch/arm/mach-clps711x/Makefile @@ -0,0 +1,13 @@ +# +# Makefile for the linux kernel. +# + +# Object file lists. + +obj-y := common.o devices.o + +obj-$(CONFIG_ARCH_AUTCPU12) += board-autcpu12.o +obj-$(CONFIG_ARCH_CDB89712) += board-cdb89712.o +obj-$(CONFIG_ARCH_CLEP7312) += board-clep7312.o +obj-$(CONFIG_ARCH_EDB7211) += board-edb7211.o +obj-$(CONFIG_ARCH_P720T) += board-p720t.o diff --git a/kernel/arch/arm/mach-clps711x/Makefile.boot b/kernel/arch/arm/mach-clps711x/Makefile.boot new file mode 100644 index 000000000..eba77d35a --- /dev/null +++ b/kernel/arch/arm/mach-clps711x/Makefile.boot @@ -0,0 +1,5 @@ +# The standard locations for stuff on CLPS711x type processors +params_phys-y := 0xc0000100 +# Should probably have some agreement on these... +initrd_phys-$(CONFIG_ARCH_P720T) := 0xc0400000 +initrd_phys-$(CONFIG_ARCH_CDB89712) := 0x00700000 diff --git a/kernel/arch/arm/mach-clps711x/board-autcpu12.c b/kernel/arch/arm/mach-clps711x/board-autcpu12.c new file mode 100644 index 000000000..45abf6bd5 --- /dev/null +++ b/kernel/arch/arm/mach-clps711x/board-autcpu12.c @@ -0,0 +1,275 @@ +/* + * linux/arch/arm/mach-clps711x/autcpu12.c + * + * (c) 2001 Thomas Gleixner, autronix automation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "common.h" +#include "devices.h" + +/* NOR flash */ +#define AUTCPU12_FLASH_BASE (CS0_PHYS_BASE) + +/* Board specific hardware definitions */ +#define AUTCPU12_CHAR_LCD_BASE (CS1_PHYS_BASE + 0x00000000) +#define AUTCPU12_CSAUX1_BASE (CS1_PHYS_BASE + 0x04000000) +#define AUTCPU12_CAN_BASE (CS1_PHYS_BASE + 0x08000000) +#define AUTCPU12_TOUCH_BASE (CS1_PHYS_BASE + 0x0a000000) +#define AUTCPU12_IO_BASE (CS1_PHYS_BASE + 0x0c000000) +#define AUTCPU12_LPT_BASE (CS1_PHYS_BASE + 0x0e000000) + +/* NVRAM */ +#define AUTCPU12_NVRAM_BASE (CS1_PHYS_BASE + 0x02000000) + +/* SmartMedia flash */ +#define AUTCPU12_SMC_BASE (CS1_PHYS_BASE + 0x06000000) +#define AUTCPU12_SMC_SEL_BASE (AUTCPU12_SMC_BASE + 0x10) + +/* Ethernet */ +#define AUTCPU12_CS8900_BASE (CS2_PHYS_BASE + 0x300) +#define AUTCPU12_CS8900_IRQ (IRQ_EINT3) + +/* NAND flash */ +#define AUTCPU12_MMGPIO_BASE (CLPS711X_NR_GPIO) +#define AUTCPU12_SMC_NCE (AUTCPU12_MMGPIO_BASE + 0) /* Bit 0 */ +#define AUTCPU12_SMC_RDY CLPS711X_GPIO(1, 2) +#define AUTCPU12_SMC_ALE CLPS711X_GPIO(1, 3) +#define AUTCPU12_SMC_CLE CLPS711X_GPIO(1, 4) + +/* LCD contrast digital potentiometer */ +#define AUTCPU12_DPOT_CS CLPS711X_GPIO(4, 0) +#define AUTCPU12_DPOT_CLK CLPS711X_GPIO(4, 1) +#define AUTCPU12_DPOT_UD CLPS711X_GPIO(4, 2) + +static struct resource autcpu12_cs8900_resource[] __initdata = { + DEFINE_RES_MEM(AUTCPU12_CS8900_BASE, SZ_1K), + DEFINE_RES_IRQ(AUTCPU12_CS8900_IRQ), +}; + +static struct resource autcpu12_nand_resource[] __initdata = { + DEFINE_RES_MEM(AUTCPU12_SMC_BASE, SZ_16), +}; + +static struct mtd_partition autcpu12_nand_parts[] __initdata = { + { + .name = "Flash partition 1", + .offset = 0, + .size = SZ_8M, + }, + { + .name = "Flash partition 2", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static void __init autcpu12_adjust_parts(struct gpio_nand_platdata *pdata, + size_t sz) +{ + switch (sz) { + case SZ_16M: + case SZ_32M: + break; + case SZ_64M: + case SZ_128M: + pdata->parts[0].size = SZ_16M; + break; + default: + pr_warn("Unsupported SmartMedia device size %u\n", sz); + break; + } +} + +static struct gpio_nand_platdata autcpu12_nand_pdata __initdata = { + .gpio_rdy = AUTCPU12_SMC_RDY, + .gpio_nce = AUTCPU12_SMC_NCE, + .gpio_ale = AUTCPU12_SMC_ALE, + .gpio_cle = AUTCPU12_SMC_CLE, + .gpio_nwp = -1, + .chip_delay = 20, + .parts = autcpu12_nand_parts, + .num_parts = ARRAY_SIZE(autcpu12_nand_parts), + .adjust_parts = autcpu12_adjust_parts, +}; + +static struct platform_device autcpu12_nand_pdev __initdata = { + .name = "gpio-nand", + .id = -1, + .resource = autcpu12_nand_resource, + .num_resources = ARRAY_SIZE(autcpu12_nand_resource), + .dev = { + .platform_data = &autcpu12_nand_pdata, + }, +}; + +static struct resource autcpu12_mmgpio_resource[] __initdata = { + DEFINE_RES_MEM_NAMED(AUTCPU12_SMC_SEL_BASE, SZ_1, "dat"), +}; + +static struct bgpio_pdata autcpu12_mmgpio_pdata __initdata = { + .base = AUTCPU12_MMGPIO_BASE, + .ngpio = 8, +}; + +static struct platform_device autcpu12_mmgpio_pdev __initdata = { + .name = "basic-mmio-gpio", + .id = -1, + .resource = autcpu12_mmgpio_resource, + .num_resources = ARRAY_SIZE(autcpu12_mmgpio_resource), + .dev = { + .platform_data = &autcpu12_mmgpio_pdata, + }, +}; + +static const struct gpio autcpu12_gpios[] __initconst = { + { AUTCPU12_DPOT_CS, GPIOF_OUT_INIT_HIGH, "DPOT CS" }, + { AUTCPU12_DPOT_CLK, GPIOF_OUT_INIT_LOW, "DPOT CLK" }, + { AUTCPU12_DPOT_UD, GPIOF_OUT_INIT_LOW, "DPOT UD" }, +}; + +static struct mtd_partition autcpu12_flash_partitions[] = { + { + .name = "NOR.0", + .offset = 0, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct physmap_flash_data autcpu12_flash_pdata = { + .width = 4, + .parts = autcpu12_flash_partitions, + .nr_parts = ARRAY_SIZE(autcpu12_flash_partitions), +}; + +static struct resource autcpu12_flash_resources[] __initdata = { + DEFINE_RES_MEM(AUTCPU12_FLASH_BASE, SZ_8M), +}; + +static struct platform_device autcpu12_flash_pdev __initdata = { + .name = "physmap-flash", + .id = 0, + .resource = autcpu12_flash_resources, + .num_resources = ARRAY_SIZE(autcpu12_flash_resources), + .dev = { + .platform_data = &autcpu12_flash_pdata, + }, +}; + +static struct resource autcpu12_nvram_resource[] __initdata = { + DEFINE_RES_MEM(AUTCPU12_NVRAM_BASE, 0), +}; + +static struct platdata_mtd_ram autcpu12_nvram_pdata = { + .bankwidth = 4, +}; + +static struct platform_device autcpu12_nvram_pdev __initdata = { + .name = "mtd-ram", + .id = 0, + .resource = autcpu12_nvram_resource, + .num_resources = ARRAY_SIZE(autcpu12_nvram_resource), + .dev = { + .platform_data = &autcpu12_nvram_pdata, + }, +}; + +static void __init autcpu12_nvram_init(void) +{ + void __iomem *nvram; + unsigned int save[2]; + resource_size_t nvram_size = SZ_128K; + + /* + * Check for 32K/128K + * Read ofs 0K + * Read ofs 64K + * Write complement to ofs 64K + * Read and check result on ofs 0K + * Restore contents + */ + nvram = ioremap(autcpu12_nvram_resource[0].start, SZ_128K); + if (nvram) { + save[0] = readl(nvram + 0); + save[1] = readl(nvram + SZ_64K); + writel(~save[0], nvram + SZ_64K); + if (readl(nvram + 0) != save[0]) { + writel(save[0], nvram + 0); + nvram_size = SZ_32K; + } else + writel(save[1], nvram + SZ_64K); + iounmap(nvram); + + autcpu12_nvram_resource[0].end = + autcpu12_nvram_resource[0].start + nvram_size - 1; + platform_device_register(&autcpu12_nvram_pdev); + } else + pr_err("Failed to remap NVRAM resource\n"); +} + +static void __init autcpu12_init(void) +{ + clps711x_devices_init(); + platform_device_register(&autcpu12_flash_pdev); + platform_device_register_simple("video-clps711x", 0, NULL, 0); + platform_device_register_simple("cs89x0", 0, autcpu12_cs8900_resource, + ARRAY_SIZE(autcpu12_cs8900_resource)); + platform_device_register(&autcpu12_mmgpio_pdev); + autcpu12_nvram_init(); +} + +static void __init autcpu12_init_late(void) +{ + gpio_request_array(autcpu12_gpios, ARRAY_SIZE(autcpu12_gpios)); + platform_device_register(&autcpu12_nand_pdev); +} + +MACHINE_START(AUTCPU12, "autronix autcpu12") + /* Maintainer: Thomas Gleixner */ + .atag_offset = 0x20000, + .map_io = clps711x_map_io, + .init_irq = clps711x_init_irq, + .init_time = clps711x_timer_init, + .init_machine = autcpu12_init, + .init_late = autcpu12_init_late, + .restart = clps711x_restart, +MACHINE_END + diff --git a/kernel/arch/arm/mach-clps711x/board-cdb89712.c b/kernel/arch/arm/mach-clps711x/board-cdb89712.c new file mode 100644 index 000000000..1ec378c33 --- /dev/null +++ b/kernel/arch/arm/mach-clps711x/board-cdb89712.c @@ -0,0 +1,147 @@ +/* + * linux/arch/arm/mach-clps711x/cdb89712.c + * + * Copyright (C) 2000-2001 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include "common.h" +#include "devices.h" + +#define CDB89712_CS8900_BASE (CS2_PHYS_BASE + 0x300) +#define CDB89712_CS8900_IRQ (IRQ_EINT3) + +static struct resource cdb89712_cs8900_resource[] __initdata = { + DEFINE_RES_MEM(CDB89712_CS8900_BASE, SZ_1K), + DEFINE_RES_IRQ(CDB89712_CS8900_IRQ), +}; + +static struct mtd_partition cdb89712_flash_partitions[] __initdata = { + { + .name = "Flash", + .offset = 0, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct physmap_flash_data cdb89712_flash_pdata __initdata = { + .width = 4, + .probe_type = "map_rom", + .parts = cdb89712_flash_partitions, + .nr_parts = ARRAY_SIZE(cdb89712_flash_partitions), +}; + +static struct resource cdb89712_flash_resources[] __initdata = { + DEFINE_RES_MEM(CS0_PHYS_BASE, SZ_8M), +}; + +static struct platform_device cdb89712_flash_pdev __initdata = { + .name = "physmap-flash", + .id = 0, + .resource = cdb89712_flash_resources, + .num_resources = ARRAY_SIZE(cdb89712_flash_resources), + .dev = { + .platform_data = &cdb89712_flash_pdata, + }, +}; + +static struct mtd_partition cdb89712_bootrom_partitions[] __initdata = { + { + .name = "BootROM", + .offset = 0, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct physmap_flash_data cdb89712_bootrom_pdata __initdata = { + .width = 4, + .probe_type = "map_rom", + .parts = cdb89712_bootrom_partitions, + .nr_parts = ARRAY_SIZE(cdb89712_bootrom_partitions), +}; + +static struct resource cdb89712_bootrom_resources[] __initdata = { + DEFINE_RES_NAMED(CS7_PHYS_BASE, SZ_128, "BOOTROM", IORESOURCE_MEM | + IORESOURCE_CACHEABLE | IORESOURCE_READONLY), +}; + +static struct platform_device cdb89712_bootrom_pdev __initdata = { + .name = "physmap-flash", + .id = 1, + .resource = cdb89712_bootrom_resources, + .num_resources = ARRAY_SIZE(cdb89712_bootrom_resources), + .dev = { + .platform_data = &cdb89712_bootrom_pdata, + }, +}; + +static struct platdata_mtd_ram cdb89712_sram_pdata __initdata = { + .bankwidth = 4, +}; + +static struct resource cdb89712_sram_resources[] __initdata = { + DEFINE_RES_MEM(CLPS711X_SRAM_BASE, CLPS711X_SRAM_SIZE), +}; + +static struct platform_device cdb89712_sram_pdev __initdata = { + .name = "mtd-ram", + .id = 0, + .resource = cdb89712_sram_resources, + .num_resources = ARRAY_SIZE(cdb89712_sram_resources), + .dev = { + .platform_data = &cdb89712_sram_pdata, + }, +}; + +static void __init cdb89712_init(void) +{ + clps711x_devices_init(); + platform_device_register(&cdb89712_flash_pdev); + platform_device_register(&cdb89712_bootrom_pdev); + platform_device_register(&cdb89712_sram_pdev); + platform_device_register_simple("cs89x0", 0, cdb89712_cs8900_resource, + ARRAY_SIZE(cdb89712_cs8900_resource)); +} + +MACHINE_START(CDB89712, "Cirrus-CDB89712") + /* Maintainer: Ray Lehtiniemi */ + .atag_offset = 0x100, + .map_io = clps711x_map_io, + .init_irq = clps711x_init_irq, + .init_time = clps711x_timer_init, + .init_machine = cdb89712_init, + .restart = clps711x_restart, +MACHINE_END diff --git a/kernel/arch/arm/mach-clps711x/board-clep7312.c b/kernel/arch/arm/mach-clps711x/board-clep7312.c new file mode 100644 index 000000000..f9ca22b64 --- /dev/null +++ b/kernel/arch/arm/mach-clps711x/board-clep7312.c @@ -0,0 +1,45 @@ +/* + * linux/arch/arm/mach-clps711x/clep7312.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include +#include +#include + +#include +#include +#include + +#include "common.h" +#include "devices.h" + +static void __init +fixup_clep7312(struct tag *tags, char **cmdline) +{ + memblock_add(0xc0000000, 0x01000000); +} + +MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312") + /* Maintainer: Nobody */ + .atag_offset = 0x0100, + .fixup = fixup_clep7312, + .map_io = clps711x_map_io, + .init_irq = clps711x_init_irq, + .init_time = clps711x_timer_init, + .init_machine = clps711x_devices_init, + .restart = clps711x_restart, +MACHINE_END diff --git a/kernel/arch/arm/mach-clps711x/board-edb7211.c b/kernel/arch/arm/mach-clps711x/board-edb7211.c new file mode 100644 index 000000000..f33979784 --- /dev/null +++ b/kernel/arch/arm/mach-clps711x/board-edb7211.c @@ -0,0 +1,188 @@ +/* + * Copyright (C) 2000, 2001 Blue Mug, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include + +#include