From 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 Mon Sep 17 00:00:00 2001 From: Yunhong Jiang Date: Tue, 4 Aug 2015 12:17:53 -0700 Subject: Add the rt linux 4.1.3-rt3 as base Import the rt linux 4.1.3-rt3 as OPNFV kvm base. It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and the base is: commit 0917f823c59692d751951bf5ea699a2d1e2f26a2 Author: Sebastian Andrzej Siewior Date: Sat Jul 25 12:13:34 2015 +0200 Prepare v4.1.3-rt3 Signed-off-by: Sebastian Andrzej Siewior We lose all the git history this way and it's not good. We should apply another opnfv project repo in future. Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423 Signed-off-by: Yunhong Jiang --- kernel/Documentation/ABI/testing/sysfs-driver-tegra-fuse | 11 +++++++++++ 1 file changed, 11 insertions(+) create mode 100644 kernel/Documentation/ABI/testing/sysfs-driver-tegra-fuse (limited to 'kernel/Documentation/ABI/testing/sysfs-driver-tegra-fuse') diff --git a/kernel/Documentation/ABI/testing/sysfs-driver-tegra-fuse b/kernel/Documentation/ABI/testing/sysfs-driver-tegra-fuse new file mode 100644 index 000000000..69f5af632 --- /dev/null +++ b/kernel/Documentation/ABI/testing/sysfs-driver-tegra-fuse @@ -0,0 +1,11 @@ +What: /sys/devices/*//fuse +Date: February 2014 +Contact: Peter De Schrijver +Description: read-only access to the efuses on Tegra20, Tegra30, Tegra114 + and Tegra124 SoC's from NVIDIA. The efuses contain write once + data programmed at the factory. The data is layed out in 32bit + words in LSB first format. Each bit represents a single value + as decoded from the fuse registers. Bits order/assignment + exactly matches the HW registers, including any unused bits. +Users: any user space application which wants to read the efuses on + Tegra SoC's -- cgit 1.2.3-korg