diff options
author | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 12:17:53 -0700 |
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committer | Yunhong Jiang <yunhong.jiang@intel.com> | 2015-08-04 15:44:42 -0700 |
commit | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (patch) | |
tree | 1c9cafbcd35f783a87880a10f85d1a060db1a563 /kernel/arch/arm/boot/dts/vf500.dtsi | |
parent | 98260f3884f4a202f9ca5eabed40b1354c489b29 (diff) |
Add the rt linux 4.1.3-rt3 as base
Import the rt linux 4.1.3-rt3 as OPNFV kvm base.
It's from git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-rt-devel.git linux-4.1.y-rt and
the base is:
commit 0917f823c59692d751951bf5ea699a2d1e2f26a2
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Date: Sat Jul 25 12:13:34 2015 +0200
Prepare v4.1.3-rt3
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
We lose all the git history this way and it's not good. We
should apply another opnfv project repo in future.
Change-Id: I87543d81c9df70d99c5001fbdf646b202c19f423
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Diffstat (limited to 'kernel/arch/arm/boot/dts/vf500.dtsi')
-rw-r--r-- | kernel/arch/arm/boot/dts/vf500.dtsi | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/kernel/arch/arm/boot/dts/vf500.dtsi b/kernel/arch/arm/boot/dts/vf500.dtsi new file mode 100644 index 000000000..e976d2fa1 --- /dev/null +++ b/kernel/arch/arm/boot/dts/vf500.dtsi @@ -0,0 +1,55 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include "skeleton.dtsi" +#include "vfxxx.dtsi" +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + a5_cpu: cpu@0 { + compatible = "arm,cortex-a5"; + device_type = "cpu"; + reg = <0x0>; + }; + }; + + soc { + aips-bus@40000000 { + + intc: interrupt-controller@40002000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + interrupt-parent = <&intc>; + reg = <0x40003000 0x1000>, + <0x40002100 0x100>; + }; + + global_timer: timer@40002200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x40002200 0x20>; + interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&intc>; + clocks = <&clks VF610_CLK_PLATFORM_BUS>; + }; + }; + }; +}; + +&mscm_ir { + interrupt-parent = <&intc>; +}; + +&wdoga5 { + status = "okay"; +}; |