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authorJiang, Yunhong <yunhong.jiang@intel.com>2016-10-28 23:29:05 +0000
committerGerrit Code Review <gerrit@opnfv.org>2016-10-28 23:29:05 +0000
commitf2e379228d244be691bee350da1cb3d820cb6dfb (patch)
tree3061748572f9dcb06fea9c367e366b2691f3a6ba
parentc0946a21d3e299d73620b6fee2327f5f0f6ebb32 (diff)
parent540333b9f4ebaaf2362437da2990f3c63ac4f2e8 (diff)
Merge "Fix imprecise timer interrupts by eliminating TSC clockevents frequency roundoff error"
-rw-r--r--kernel/arch/x86/kernel/apic/apic.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/kernel/arch/x86/kernel/apic/apic.c b/kernel/arch/x86/kernel/apic/apic.c
index 2f69e3b18..d2eee3e1b 100644
--- a/kernel/arch/x86/kernel/apic/apic.c
+++ b/kernel/arch/x86/kernel/apic/apic.c
@@ -305,7 +305,7 @@ int lapic_get_maxlvt(void)
/* Clock divisor */
#define APIC_DIVISOR 16
-#define TSC_DIVISOR 32
+#define TSC_DIVISOR 8
/*
* This function sets up the local APIC timer, with a timeout of
@@ -557,7 +557,7 @@ static void setup_APIC_timer(void)
CLOCK_EVT_FEAT_DUMMY);
levt->set_next_event = lapic_next_deadline;
clockevents_config_and_register(levt,
- (tsc_khz / TSC_DIVISOR) * 1000,
+ tsc_khz * (1000 / TSC_DIVISOR),
0xF, ~0UL);
} else
clockevents_register_device(levt);