From ecf1ba1c5000718d1f0d90270af33039b488c835 Mon Sep 17 00:00:00 2001 From: Maryam Tahhan Date: Tue, 24 Oct 2017 15:21:40 +0100 Subject: src: fix src build issues Change-Id: I8abf40a0034110dc504c227ffba1ff5e9ec6850b Signed-off-by: Maryam Tahhan Signed-off-by: Taras Chornyi --- .../collectd_sample_configs/intel_pmu.conf | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 src/collectd/collectd_sample_configs/intel_pmu.conf (limited to 'src/collectd/collectd_sample_configs/intel_pmu.conf') diff --git a/src/collectd/collectd_sample_configs/intel_pmu.conf b/src/collectd/collectd_sample_configs/intel_pmu.conf new file mode 100644 index 00000000..db83e4bb --- /dev/null +++ b/src/collectd/collectd_sample_configs/intel_pmu.conf @@ -0,0 +1,22 @@ +# Copyright 2017 OPNFV +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +LoadPlugin intel_pmu + + + ReportHardwareCacheEvents true + ReportKernelPMUEvents true + ReportSoftwareEvents true +# EventList "/var/cache/pmu/GenuineIntel-6-2D-core.json" +# HardwareEvents "L2_RQSTS.CODE_RD_HIT,L2_RQSTS.CODE_RD_MISS" "L2_RQSTS.ALL_CODE_RD" + -- cgit 1.2.3-korg